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Video Coding Engine
AMD hardware accelerator for encoding MP4 H.264 videos, built into AMD GPU's

Video Code Engine (VCE, was earlier referred to as Video Coding Engine, Video Compression Engine or Video Codec Engine in official AMD documentation) is AMD's video encoding application-specific integrated circuit implementing the video codec H.264/MPEG-4 AVC. Since 2012 it was integrated into all of their GPUs and APUs except Oland.

VCE was introduced with the Radeon HD 7000 series on 22 December 2011. VCE occupies a considerable amount of the die surface at the time of its introduction and is not to be confused with AMD's Unified Video Decoder (UVD).

As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN).

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Overview

The handling of video data involves computation of data compression algorithms and possibly of video processing algorithms. As the template compression methods shows, lossy video compression algorithms involve the steps: motion estimation (ME), discrete cosine transform (DCT), and entropy encoding (EC).

AMD Video Code Engine (VCE) is a full hardware implementation of the video codec H.264/MPEG-4 AVC. It is capable of delivering 1080p at 60 frames/sec. Because its entropy encoding block is also a separately accessible Video Codec Engine, it can be operated in two modes: full-fixed mode and hybrid mode.89

By employing AMD APP SDK, available for Linux and Microsoft Windows, developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding. In hybrid mode, only the entropy encoding block of the VCE unit is used, while the remaining computation is offloaded to the 3D engine of the GPU, so the computing scales with the number of available compute units (CUs).

VCE 1.0

VCE10 Version 1.0 supports H.264 YUV420 (I & P frames), H.264 SVC Temporal Encode VCE, and Display Encode Mode (DEM).

It can be found on:

  • Piledriver-based
    • Trinity APUs (Ax-5xxx, e.g. A10-5800K)
    • Richland APUs (Ax-6xxx, e.g. A10-6800K)
  • GPUs of the Southern Islands generation (GCN1: CAYMAN, ARUBA (Trinity/Richland), CAPE VERDE, PITCAIRN, TAHITI). These are
    • Radeon HD 7700 series (except HD 7790 with VCE 2.0)
    • Radeon HD 7800 series
    • Radeon HD 7900 series
    • Radeon HD 8570 to 8990 (except HD 8770 with VCE 2.0)
    • Radeon R7 250E, 250X, 265 / R9 270, 270X, 280, 280X
    • Radeon R7 360, 370, 455 / R9 370, 370X
    • Mobile Radeon HD 77x0M to HD 7970M
    • Mobile Radeon HD 8000-Series
    • Mobile Radeon Rx M2xx Series (except R9 M280X with VCE 2.0 and R9 M295X with VCE 3.0)
    • Mobile Radeon R5 M330 to R9 M390
    • FirePro cards with 1st Generation GCN (GCN1) (Except W2100, which is Oland XT)

VCE 2.0

Compared to the first version, VCE 2.0 adds H.264 YUV444 (I-Frames), B-frames for H.264 YUV420, and improvements to the DEM (Display Encode Mode), which results in a better encoding quality.

It can be found on:

  • Steamroller-based
    • Kaveri APUs (Ax-7xxx, e.g. A10-7850K)
    • Godavari APUs (Ax-7xxx, e.g. A10-7890K)
  • Jaguar-based
    • Kabini APUs (e.g. Athlon 5350, Sempron 2650)
    • Temash APUs (e.g. A6-1450, A4-1200)
  • Puma-based
    • Beema and Mullins
  • GPUs of the Sea Islands generation as well Bonaire or Hawaii GPUs (2nd Generation Graphics Core Next), such as
    • Radeon HD 7790, 8770
    • Radeon R7 260, 260X / R9 290, 290X, 295X2
    • Radeon R7 360 / R9 390, 390X
    • Mobile Radeon R9 M280X
    • Mobile Radeon R9 M385, M385X
    • Mobile Radeon R9 M470, M470X
    • FirePro W4300, W5100, W8100, W9100, S9100, S9150, S9170
    • Mobile FirePro M6100, W6150M, W6170M

VCE 3.0

Video Code Engine 3.0 (VCE 3.0) technology features a new high-quality video scaling and - since version 3.4 - High Efficiency Video Coding (HEVC/H.265).1112

It, together with UVD 6.0, can be found on 3rd generation of Graphics Core Next (GCN3) with "Tonga" and "Fiji" (VCE 3.0) based graphics controller hardware, which is now used AMD Radeon Rx 300 series (Pirate Islands GPU family) and VCE 3.4 by actual AMD Radeon Rx 400 series and AMD Radeon 500 series (both Polaris GPU family).

  • Tonga: Radeon R9 285, 380, 380X; Mobile Radeon R9 M390X, M395, M395X, M485X
  • Tonga XT: FirePro W7100, S7100X, S7150, S7150 X2
  • Fiji: Radeon R9 Fury, Fury X, Nano; Radeon Pro Duo (2016); FirePro S9300, W7170M; Instinct MI8
  • Polaris: RX 460, 470, 480; RX 550, 560, 570, 580; Radeon Pro Duo (2017)

AMD's Carrizo platform features VCE 3.1, retaining the same capabilities as the VCE found in "Fiji" and "Tonga".13

Stoney Ridge features a cut down version of VCE 3.4 without HEVC/H.265 encoding and is accompanied by a UVD 6.2 engine.14

VCE 3.0 removes support for H.264 B-frames.15

VCE 4.0

The Video Code Engine 4.0 encoder and UVD 7.0 decoder are included in the Vega-based GPUs.1617

VCE 4.1

AMD's Vega20 GPU, present in the Instinct Mi50, Instinct Mi60 and Radeon VII cards, include VCE 4.1 and two UVD 7.2 instances.1819

Feature overview

APUs

The following table shows features of AMD's processors with 3D graphics, including APUs (see also: List of AMD processors with 3D graphics).

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PlatformHigh, standard and low powerLow and ultra-low power
CodenameServerBasicToronto
MicroKyoto
DesktopPerformanceRaphaelPhoenix
MainstreamLlanoTrinityRichlandKaveriKaveri Refresh (Godavari)CarrizoBristol RidgeRaven RidgePicassoRenoirCezanne
Entry
BasicKabiniDalí
MobilePerformanceRenoirCezanneRembrandtDragon Range
MainstreamLlanoTrinityRichlandKaveriCarrizoBristol RidgeRaven RidgePicassoRenoirLucienneCezanneBarcelóPhoenix
EntryDalíMendocino
BasicDesna, Ontario, ZacateKabini, TemashBeema, MullinsCarrizo-LStoney RidgePollock
EmbeddedTrinityBald EagleMerlin Falcon,Brown FalconGreat Horned OwlGrey HawkOntario, ZacateKabiniSteppe Eagle, Crowned Eagle, LX-FamilyPrairie FalconBanded KestrelRiver Hawk
ReleasedAug 2011Oct 2012Jun 2013Jan 20142015Jun 2015Jun 2016Oct 2017Jan 2019Mar 2020Jan 2021Jan 2022Sep 2022Jan 2023Jan 2011May 2013Apr 2014May 2015Feb 2016Apr 2019Jul 2020Jun 2022Nov 2022
CPU microarchitectureK10PiledriverSteamrollerExcavator"Excavator+"20ZenZen+Zen 2Zen 3Zen 3+Zen 4BobcatJaguarPumaPuma+21"Excavator+"ZenZen+"Zen 2+"
ISAx86-64 v1x86-64 v2x86-64 v3x86-64 v4x86-64 v1x86-64 v2x86-64 v3
SocketDesktopPerformance—AM5——
Mainstream—AM4——
EntryFM1FM2FM2+FM2+22, AM4AM4—
Basic——AM1—FP5—
OtherFS1FS1+, FP2FP3FP4FP5FP6FP7FL1FP7 FP7r2 FP8FT1FT3FT3bFP4FP5FT5FP5FT6
PCI Express version2.03.04.05.04.02.03.0
CXL——
Fab. (nm)GF 32SHP(HKMG SOI)GF 28SHP(HKMG bulk)GF 14LPP(FinFET bulk)GF 12LP(FinFET bulk)TSMC N7(FinFET bulk)TSMC N6 (FinFET bulk)CCD: TSMC N5 (FinFET bulk)cIOD: TSMC N6(FinFET bulk)TSMC 4nm (FinFET bulk)TSMC N40(bulk)TSMC N28(HKMG bulk)GF 28SHP(HKMG bulk)GF 14LPP(FinFET bulk)GF 12LP(FinFET bulk)TSMC N6 (FinFET bulk)
Die area (mm2)22824624524525021023156180210CCD: (2x) 70cIOD: 12217875 (+ 28 FCH)107?125149~100
Min TDP (W)351712101565354.543.95106128
Max APU TDP (W)10095654517054182565415
Max stock APU base clock (GHz)33.84.14.13.73.83.63.73.84.03.34.74.31.752.222.23.22.61.23.352.8
Max APUs per node2411
Max core dies per CPU1211
Max CCX per core die1211
Max cores per CCX482424
Max CPU25 cores per APU481682424
Max threads per CPU core1212
Integer pipeline structure3+32+24+24+2+11+3+3+1+21+1+1+12+24+24+2+1
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF
IOMMU26—v2v1v2
BMI1, AES-NI, CLMUL, and F16C—
MOVBE—
AVIC, BMI2, RDRAND, and MWAITX/MONITORX—
SME27, TSME28, ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing——
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT——
MPK, VAES——
SGX——
FPUs per core10.5110.51
Pipes per FPU22
FPU pipe width128-bit256-bit80-bit128-bit256-bit
CPU instruction set SIMD levelSSE4a29AVXAVX2AVX-512SSSE3AVXAVX2
3DNow!3DNow!+——
PREFETCH/PREFETCHW
GFNI——
AMX—
FMA4, LWP, TBM, and XOP————
FMA3
AMD XDNA——
L1 data cache per core (KiB)64163232
L1 data cache associativity (ways)2488
L1 instruction caches per core10.5110.51
Max APU total L1 instruction cache (KiB)2561281922565122566412896128
L1 instruction cache associativity (ways)23482348
L2 caches per core10.5110.51
Max APU total L2 cache (MiB)424161212
L2 cache associativity (ways)168168
Max on-die L3 cache per CCX (MiB)—41632—4
Max 3D V-Cache per CCD (MiB)—64——
Max total in-CCD L3 cache per APU (MiB)4816644
Max. total 3D V-Cache per APU (MiB)—64——
Max. board L3 cache per APU (MiB)——
Max total L3 cache per APU (MiB)48161284
APU L3 cache associativity (ways)1616
L3 cache schemeVictimVictim
Max. L4 cache——
Max stock DRAM supportDDR3-1866DDR3-2133DDR3-2133, DDR4-2400DDR4-2400DDR4-2933DDR4-3200, LPDDR4-4266DDR5-4800, LPDDR5-6400DDR5-5200DDR5-5600, LPDDR5x-7500DDR3L-1333DDR3L-1600DDR3L-1866DDR3-1866, DDR4-2400DDR4-2400DDR4-1600DDR4-3200LPDDR5-5500
Max DRAM channels per APU21212
Max stock DRAM bandwidth (GB/s) per APU29.86634.13238.40046.93268.256102.40083.200120.00010.66612.80014.93319.20038.40012.80051.20088.000
GPU microarchitectureTeraScale 2 (VLIW5)TeraScale 3 (VLIW4)GCN 2nd genGCN 3rd genGCN 5th gen30RDNA 2RDNA 3TeraScale 2 (VLIW5)GCN 2nd genGCN 3rd gen31GCN 5th genRDNA 2
GPU instruction setTeraScale instruction setGCN instruction setRDNA instruction setTeraScale instruction setGCN instruction setRDNA instruction set
Max stock GPU base clock (MHz)60080084486611081250140021002400400538600?847900120060013001900
Max stock GPU base GFLOPS32480614.4648.1886.71134.517601971.22150.43686.4102.486???345.6460.8230.41331.2486.4
3D engine33Up to 400:20:8Up to 384:24:6Up to 512:32:8Up to 704:44:1634Up to 512:32:8768:48:8128:8:480:8:4128:8:4Up to 192:12:8Up to 192:12:4192:12:4Up to 512:?:?128:?:?
IOMMUv1IOMMUv2IOMMUv1?IOMMUv2
Video decoderUVD 3.0UVD 4.2UVD 6.0VCN 1.035VCN 2.136VCN 2.237VCN 3.1?UVD 3.0UVD 4.0UVD 4.2UVD 6.2VCN 1.0VCN 3.1
Video encoder—VCE 1.0VCE 2.0VCE 3.1—VCE 2.0VCE 3.4
AMD Fluid Motion
GPU power savingPowerPlayPowerTunePowerPlayPowerTune38
TrueAudio—39?—
FreeSync1212
HDCP40?1.42.22.3?1.42.22.3
PlayReady41—3.0 not yet—3.0 not yet
Supported displays422–32–433 (desktop)4 (mobile, embedded)42344
/drm/radeon434445——
/drm/amdgpu4647—48—49

GPUs

The following table shows features of AMD/ATI's GPUs (see also: List of AMD graphics processing units).

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Name of GPU seriesWonderMach3D RageRage ProRage 128R100R200R300R400R500R600RV670R700EvergreenNorthernIslandsSouthernIslandsSeaIslandsVolcanicIslandsArcticIslands/PolarisVegaNavi 1xNavi 2xNavi 3xNavi 4x
Released19861991Apr1996Mar1997Aug1998Apr2000Aug2001Sep2002May2004Oct2005May2007Nov2007Jun2008Sep2009Oct2010Dec2010Jan2012Sep2013Jun2015Jun 2016, Apr 2017, Aug 2019Jun 2017, Feb 2019Jul2019Nov2020Dec2022Feb2025
Marketing NameWonderMach3DRageRageProRage128Radeon7000Radeon8000Radeon9000RadeonX700/X800RadeonX1000RadeonHD 2000RadeonHD 3000RadeonHD 4000RadeonHD 5000RadeonHD 6000RadeonHD 7000Radeon200Radeon300Radeon400/500/600RadeonRX Vega, Radeon VIIRadeonRX 5000RadeonRX 6000RadeonRX 7000RadeonRX 9000
AMD support
Kind2D3D
Instruction set architectureNot publicly knownTeraScale instruction setGCN instruction setRDNA instruction set
MicroarchitectureNot publicly knownGFX1GFX2TeraScale 1(VLIW5)(GFX3)TeraScale 2(VLIW5)(GFX4)TeraScale 2(VLIW5) up to 68xx(GFX4)TeraScale 3(VLIW4) in 69xx 5051(GFX5)GCN 1stgen(GFX6)GCN 2ndgen(GFX7)GCN 3rdgen(GFX8)GCN 4thgen(GFX8)GCN 5thgen(GFX9)RDNA(GFX10.1)RDNA 2(GFX10.3)RDNA 3(GFX11)RDNA 4(GFX12)
TypeFixed pipeline52Programmable pixel & vertex pipelinesUnified shader model
Direct3D—5.06.07.08.19.011 (9_2)9.0b11 (9_2)9.0c11 (9_3)10.011 (10_0)10.111 (10_1)11 (11_0)11 (11_1)12 (11_1)11 (12_0)12 (12_0)11 (12_1)12 (12_1)11 (12_1)12 (12_2)
Shader model—1.42.0+2.0b3.04.04.15.05.15.16.56.76.8
OpenGL—1.11.21.32.153543.34.5555657584.6
Vulkan—1.159601.3611.462
OpenCL—Close to Metal1.1 (not supported by Mesa)1.2+ (on Linux: 1.1+ (no Image support on clover, with by rustiCL) with Mesa, 1.2+ on GCN 1.Gen)2.0+ (Adrenalin driver on Win7+)(on Linux ROCM, Mesa 1.2+ (no Image support in clover, but in rustiCL with Mesa, 2.0+ and 3.0 with AMD drivers or AMD ROCm), 5th gen: 2.2 win 10+ and Linux RocM 5.0+2.2+ and 3.0 windows 8.1+ and Linux ROCM 5.0+ (Mesa rustiCL 1.2+ and 3.0 (2.1+ and 2.2+ wip))636465
HSA / ROCm—?
Video decoding ASIC—Avivo/UVDUVD+UVD 2UVD 2.2UVD 3UVD 4UVD 4.2UVD 5.0 or 6.0UVD 6.3UVD 7 6667VCN 2.0 6869VCN 3.0 70VCN 4.0VCN 5.0
Video encoding ASIC—VCE 1.0VCE 2.0VCE 3.0 or 3.1VCE 3.4VCE 4.0 7172
Fluid Motion 73?
Power saving?PowerPlayPowerTunePowerTune & ZeroCore Power?
TrueAudio—Via dedicated DSPVia shaders
FreeSync—12
HDCP74—?1.42.22.3 75
PlayReady76—3.03.0
Supported displays771–222–6?4
Max. resolution?2–6 ×2560×16002–6 ×4096×2160 @ 30 Hz2–6 ×5120×2880 @ 60 Hz3 ×7680×4320 @ 60 Hz 787680×4320 @ 60 Hz PowerColor7680x4320

@165 Hz

7680x4320
/drm/radeon79—
/drm/amdgpu80—Optional 81

Operating system support

The VCE SIP core needs to be supported by the device driver. The device driver provides one or multiple interfaces, e. g. OpenMAX IL. One of these interfaces is then used by end-user software, like GStreamer or HandBrake (HandBrake rejected VCE support in December 2016,82 but added it in December 201883), to access the VCE hardware and make use of it.

AMD's proprietary device driver AMD Catalyst is available for multiple operating systems and support for VCE was added to it. Additionally, a free device driver is available. This driver also supports the VCE hardware.

Linux

Main articles: AMD Catalyst for Linux and Free Radeon driver

Windows

The software "MediaShow Espresso Video Transcoding" seems to utilize VCE and UVD to the fullest extent possible.88

XSplit Broadcaster supports VCE from version 1.3.89

Open Broadcaster Software (OBS Studio) supports VCE for recording and streaming. The original Open Broadcaster Software (OBS) requires a fork build in order to enable VCE.90

AMD Radeon Software supports VCE with built in game capture ("Radeon ReLive") and use AMD AMF/VCE on APU or Radeon Graphics card to reduce FPS drop when capturing game or video content.91

HandBrake added Video Coding Engine support in version 1.2.0 in December 2018.92

Successor

Main article: Video Core Next

The VCE was succeeded by AMD Video Core Next in the Raven Ridge series of APUs released in October 2017. The VCN combines both encode (VCE) and decode (UVD).93

See also

Video hardware technologies

AMD

Others

References

  1. "Introducing the Video Coding Engine (VCE) - AMD". developer.amd.com. Archived from the original on 4 June 2016. Retrieved 15 January 2022. https://web.archive.org/web/20160604071338/http://developer.amd.com/community/blog/2014/02/19/introducing-video-coding-engine-vce/ ↩

  2. "Product brief". amd.com. https://www.amd.com/en/media/43876/download ↩

  3. "Updates" (PDF). amd.com. https://subscriptions.amd.com/newsletters/channelnews/pdf_guides/51884i_update_to_the_qrg_october2014.pdf ↩

  4. "White Paper AMD UnifiedVideoDecoder (UVD)" (PDF). 2012-06-15. Retrieved 2017-05-20. https://www.amd.com/Documents/UVD3_whitepaper.pdf ↩

  5. "AnandTech Portal | AMD Radeon HD 7970 Review: 28nm And Graphics Core Next, Together As One". Anandtech.com. Retrieved 2014-03-27. https://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 ↩

  6. "AMD's Radeon HD 7970 graphics processor - The Tech Report - Page 5". The Tech Report. 3 January 2012. Retrieved 2014-03-27. https://techreport.com/review/22192/amd-radeon-hd-7970-graphics-processor/5 ↩

  7. "AMD A-Series APU block diagram". 2011-06-30. Retrieved 2015-01-22. http://www.abload.de/img/llano-blockdiagramm-95qhq1.jpg ↩

  8. "Video & Movies: The Video Codec Engine, UVD3, & Steady Video 2.0". AnandTech. December 22, 2011. Retrieved 2017-05-20. https://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 ↩

  9. "Radeon HD 8900 Specs". AMD. Retrieved 2016-07-18. https://www.amd.com/en-us/products/graphics/desktop/oem/8900 ↩

  10. "Introducing the Video Coding Engine (VCE) - AMD". developer.amd.com. Archived from the original on 4 June 2016. Retrieved 15 January 2022. https://web.archive.org/web/20160604071338/http://developer.amd.com/community/blog/2014/02/19/introducing-video-coding-engine-vce/ ↩

  11. "Mailing Lists". lists.freedesktop.org. 4 June 2015. Retrieved 25 September 2023. https://lists.freedesktop.org/archives/dri-devel/2015-June/084083.html ↩

  12. "VCEEnc". June 10, 2023 – via GitHub. https://github.com/rigaya/VCEEnc ↩

  13. "AMDGPU (vi.c)". GitHub. https://github.com/ROCm/ROCK-Kernel-Driver/blob/master/drivers/gpu/drm/amd/amdgpu/vi.c#L282-L289 ↩

  14. "AMDGPU (vi.c)". GitHub. https://github.com/ROCm/ROCK-Kernel-Driver/blob/master/drivers/gpu/drm/amd/amdgpu/vi.c#L2192-L2193 ↩

  15. "Video Encode API: BFrames not supported on RX 4xx? · Issue #8 · GPUOpen-LibrariesAndSDKs/AMF". GitHub. https://github.com/GPUOpen-LibrariesAndSDKs/AMF/issues/8 ↩

  16. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  17. Larabel, Michael (20 March 2017). "AMD Sends Out 100 Patches, Enabling Vega Support In AMDGPU DRM". Phoronix. Retrieved 25 August 2017. https://www.phoronix.com/scan.php?page=news_item&px=AMDGPU-Vega-10-Support ↩

  18. Deucher, Alex (15 May 2018). "[PATCH 50/57] drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2". Retrieved 2019-01-13. https://lists.freedesktop.org/archives/amd-gfx/2018-May/022291.html ↩

  19. Deucher, Alex (15 May 2018). "[PATCH 42/57] drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files". Retrieved 2019-01-13. https://lists.freedesktop.org/archives/amd-gfx/2018-May/022282.html ↩

  20. "AMD Announces the 7th Generation APU: Excavator mk2 in Bristol Ridge and Stoney Ridge for Notebooks". 31 May 2016. Retrieved 3 January 2020. https://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks ↩

  21. "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015. https://www.amd.com/en-us/press-releases/Pages/amd-mobile-carrizo-2014nov20.aspx ↩

  22. For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845. ↩

  23. "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017. https://www.techarp.com/guides/mobile-cpu-comparison-guide/5/ ↩

  24. A PC would be one node. ↩

  25. An APU combines a CPU and a GPU. Both have cores. ↩

  26. Requires firmware support. ↩

  27. Requires firmware support. ↩

  28. Requires firmware support. ↩

  29. No SSE4. No SSSE3. ↩

  30. "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017. http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ ↩

  31. "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017. http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ ↩

  32. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation. /wiki/Single-precision_floating-point_format ↩

  33. Unified shaders : texture mapping units : render output units /wiki/Unified_shader_model ↩

  34. Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018. https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3 ↩

  35. Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017. https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands ↩

  36. "AMD Ryzen 5000G 'Cezanne' APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package". wccftech. Aug 12, 2021. Retrieved August 25, 2021. https://wccftech.com/amd-ryzen-5000g-cezanne-apu-first-high-res-die-shots-10-7-billion-transistors/ ↩

  37. "AMD Ryzen 5000G 'Cezanne' APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package". wccftech. Aug 12, 2021. Retrieved August 25, 2021. https://wccftech.com/amd-ryzen-5000g-cezanne-apu-first-high-res-die-shots-10-7-billion-transistors/ ↩

  38. Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016 http://meseec.ce.rit.edu/551-projects/fall2014/3-4.pdf ↩

  39. "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014. http://semiaccurate.com/2014/01/15/technical-look-amds-kaveri-architecture/ ↩

  40. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  41. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  42. To feed more than two displays, the additional panels must have native DisplayPort support.[28] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed. /wiki/DisplayPort ↩

  43. DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  44. Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016. http://airlied.livejournal.com/68805.html ↩

  45. "Radeon feature matrix". freedesktop.org. Retrieved 10 January 2016. http://xorg.freedesktop.org/wiki/RadeonFeature/ ↩

  46. DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  47. Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016. http://www.x.org/wiki/Events/XDC2015/Program/deucher_zhou_amdgpu.pdf ↩

  48. Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org. https://lists.x.org/archives/xorg-announce/2016-November/002741.html ↩

  49. Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org. https://lists.x.org/archives/xorg-announce/2016-November/002741.html ↩

  50. "AMD Radeon HD 6900 (AMD Cayman) series graphics cards". HWlab. hw-lab.com. December 19, 2010. Archived from the original on August 23, 2022. Retrieved August 23, 2022. New VLIW4 architecture of stream processors allowed to save area of each SIMD by 10%, while performing the same compared to previous VLIW5 architecture http://web.archive.org/web/20220823180458/https://hw-lab.com/amd-radeon-hd-6900-series-amd-cayman.html/4 ↩

  51. "GPU Specs Database". TechPowerUp. Retrieved August 23, 2022. https://www.techpowerup.com/gpu-specs/?generation=Northern%20Islands&architecture=TeraScale%203&sort=generation ↩

  52. The Radeon 100 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders. /wiki/Radeon_R100_series#R100's_pixel_shaders ↩

  53. R300, R400 and R500 based cards do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power of two (NPOT) textures. ↩

  54. "NPOT Texture (OpenGL Wiki)". Khronos Group. Retrieved February 10, 2021. https://www.khronos.org/opengl/wiki/NPOT_Texture ↩

  55. "AMD Radeon Software Crimson Edition Beta". AMD. Retrieved 2018-04-20. https://support.amd.com/en-us/kb-articles/pages/amd-radeon-software-crimson-edition-beta.aspx ↩

  56. "Mesamatrix". mesamatrix.net. Retrieved 2018-04-22. https://mesamatrix.net/ ↩

  57. "RadeonFeature". X.Org Foundation. Retrieved 2018-04-20. https://www.x.org/wiki/RadeonFeature/ ↩

  58. OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware. ↩

  59. OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware. ↩

  60. Vulkan support is theoretically possible but has not been implemented in a stable driver. ↩

  61. "Conformant Products". Khronos Group. Retrieved 2024-12-02. https://www.khronos.org/conformance/adopters/conformant-products#submission_820 ↩

  62. "radv: add Vulkan 1.4 support". Mesa. Retrieved 2024-12-02. https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32432 ↩

  63. "AMD Radeon RX 6800 XT Specs". TechPowerUp. Retrieved January 1, 2021. https://www.techpowerup.com/gpu-specs/radeon-rx-6800-xt.c3694 ↩

  64. "AMD Launches The Radeon PRO W7500/W7600 RDNA3 GPUs". Phoronix. 3 August 2023. Retrieved 4 September 2023. https://www.phoronix.com/news/AMD-Radeon-PRO-W7500-W7600 ↩

  65. "AMD Radeon Pro 5600M Grafikkarte". TopCPU.net (in German). Retrieved 4 September 2023. https://www.topcpu.net/de/cpu/Radeon-Pro-5600M ↩

  66. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  67. The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega. /wiki/Ryzen#Raven_Ridge ↩

  68. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  69. The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega. /wiki/Ryzen#Raven_Ridge ↩

  70. Larabel, Michael (September 15, 2020). "AMD Radeon Navi 2 / VCN 3.0 Supports AV1 Video Decoding". Phoronix. Retrieved January 1, 2021. https://www.phoronix.com/scan.php?page=news_item&px=AV1-Decode-For-AMD-VCN-3.0 ↩

  71. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  72. The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega. /wiki/Ryzen#Raven_Ridge ↩

  73. Video processing for video frame rate interpolation technique. In Windows it works as a DirectShow filter in your player. In Linux, there is no support on the part of drivers and / or community. ↩

  74. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  75. Edmonds, Rich (February 4, 2022). "ASUS Dual RX 6600 GPU review: Rock-solid 1080p gaming with impressive thermals". Windows Central. Retrieved November 1, 2022. https://www.windowscentral.com/asus-dual-rx-6600-gpu-review ↩

  76. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  77. More displays may be supported with native DisplayPort connections, or splitting the maximum resolution between multiple monitors with active converters. /wiki/DisplayPort ↩

  78. "Radeon's next-generation Vega architecture" (PDF). Radeon Technologies Group (AMD). Archived from the original (PDF) on September 6, 2018. Retrieved June 13, 2017. https://web.archive.org/web/20180906124605/http://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf ↩

  79. DRM (Direct Rendering Manager) is a component of the Linux kernel. AMDgpu is the Linux kernel module. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  80. DRM (Direct Rendering Manager) is a component of the Linux kernel. AMDgpu is the Linux kernel module. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  81. "AMDGPU". Retrieved December 29, 2023. https://wiki.gentoo.org/wiki/AMDGPU ↩

  82. "HandBrake rejected VCE pull request". GitHub. 2016-12-08. Retrieved 2017-08-15. https://github.com/HandBrake/HandBrake/pull/88 ↩

  83. "HandBrake added VCE support in v1.2.0". 2018-12-22. Retrieved 2018-12-31. https://forum.handbrake.fr/viewtopic.php?f=33&t=38539#p181659 ↩

  84. König, Christian (4 February 2014). "initial VCE support". mesa-dev (Mailing list). Retrieved 28 November 2015. https://lists.freedesktop.org/archives/mesa-dev/2014-February/053203.html ↩

  85. König, Christian (24 October 2013). "OpenMAX state tracker". mesa-dev (Mailing list). Retrieved 28 November 2015. https://lists.freedesktop.org/archives/mesa-dev/2013-October/046943.html ↩

  86. "AMD Open-Sources VCE Video Encode Engine Code". Phoronix. 2014-02-04. Retrieved 2017-05-20. https://www.phoronix.com/scan.php?page=news_item&px=MTU5MTc ↩

  87. "st/omx/enc: implement h264 level support". 2014-06-12. Retrieved 2017-05-20. https://cgit.freedesktop.org/mesa/mesa/commit/?id=e2db7c10d63399b6a34ba5fa56ce9e1eac402416 ↩

  88. "MediaShow Espresso Video Transcoding Benchmark". 2014-01-14. Retrieved 2017-05-20. https://www.guru3d.com/articles_pages/amd_a8_7600_apu_review,13.html ↩

  89. "XSplit Broadcaster 1.3 maintenance update includes mainly performance enhancements and maintenance fixes including such noteworthy features such as support for AMD's VCE H.264 hardware encoder". Archived from the original on 2014-07-22. https://archive.today/20140722041719/http://www.splitmedialabs.com/news/109-splitmedialabs-releases-xsplit-gamecaster-and-updates-xsplit-broadcaster-13 ↩

  90. "OBS branch with AMD VCE support". May 2, 2014. Retrieved 2017-05-20. https://obsproject.com/forum/threads/obs-branch-with-amd-vce-support.13996/ ↩

  91. "Radeon Software Crimson ReLive Edition 16.12.1 Release Notes". Retrieved 2017-05-20. http://support.amd.com/en-us/kb-articles/Pages/Radeon-Software-Crimson-ReLive-Edition-16.12.1-Release-Notes.aspx ↩

  92. "HandBrake added VCE support in v1.2.0". 2018-12-22. Retrieved 2018-12-31. https://forum.handbrake.fr/viewtopic.php?f=33&t=38539#p181659 ↩

  93. Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands In Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017. https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands ↩