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Unified Video Decoder
AMD's dedicated video decoding ASIC

Unified Video Decoder (UVD, previously called Universal Video Decoder) is the name given to AMD's dedicated video decoding ASIC. There are multiple versions implementing a multitude of video codecs, such as H.264 and VC-1.

UVD was introduced with the Radeon HD 2000 Series and is integrated into some of AMD's GPUs and APUs. UVD occupies a considerable amount of the die surface at the time of its introduction and is not to be confused with AMD's Video Coding Engine (VCE).

As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN).

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Overview

The UVD is based on an ATI Xilleon video processor, which is incorporated onto the same die as the GPU and is part of the ATI Avivo HD for hardware video decoding, along with the Advanced Video Processor (AVP). UVD, as stated by AMD, handles decoding of H.264/AVC, and VC-1 video codecs entirely in hardware.

The UVD technology is based on the Cadence Tensilica Xtensa2 processor,345 which was originally licensed by ATI Technologies Inc. in 2004.6

UVD/UVD+

In early versions of UVD, video post-processing is passed to the pixel shaders and OpenCL kernels. MPEG-2 decoding is not performed within UVD, but in the shader processors. The decoder meets the performance and profile requirements of Blu-ray and HD DVD, decoding H.264 bitstreams up to a bitrate of 40 Mbit/s. It has context-adaptive binary arithmetic coding (CABAC) support for H.264/AVC.

Unlike video acceleration blocks in previous generation GPUs, which demanded considerable host-CPU involvement, UVD offloads the entire video-decoder process for VC-1 and H.264 except for video post-processing, which is offloaded to the shaders. MPEG-2 decode is also supported, but the bitstream/entropy decode is not performed for MPEG-2 video in hardware.

Previously, neither ATI Radeon R520 series' ATI Avivo nor NVidia Geforce 7 series' PureVideo assisted front-end bitstream/entropy decompression in VC-1 and H.264 - the host CPU performed this work.7 UVD handles VLC/CAVLC/CABAC, frequency transform, pixel prediction and inloop deblocking, but passes the post processing to the shaders.8 Post-processing includes denoising, de-interlacing, and scaling/resizing. AMD has also stated that the UVD component being incorporated into the GPU core only occupies 4.7 mm² in area on 65 nm fabrication process node.

A variation on UVD, called UVD+, was introduced with the Radeon HD 3000 series. UVD+ support HDCP for higher resolution video streams.9 But UVD+ was also being marketed as simply UVD.

UVD 2

The UVD saw a refresh with the release of the Radeon HD 4000 series products. The UVD 2 features full bitstream decoding of H.264/MPEG-4 AVC, VC-1, as well as iDCT level acceleration of MPEG2 video streams. Performance improvements allow dual video stream decoding and Picture-in-Picture mode. This makes UVD2 full BD-Live compliant.

The UVD 2.2 features a re-designed local memory interface and enhances the compatibility with MPEG2/H.264/VC-1 videos. However, it was marketed under the same alias as "UVD 2 Enhanced" as the "special core-logic, available in RV770 and RV730 series of GPUs, for hardware decoding of MPEG2, H.264 and VC-1 video with dual-stream decoding". The nature of UVD 2.2 being an incremental update to the UVD 2 can be accounted for this move.

UVD 3

UVD 3 adds support for additional hardware MPEG2 decoding (entropy decode), DivX and Xvid via MPEG-4 Part 2 decoding (entropy decode, inverse transform, motion compensation) and Blu-ray 3D via MVC (entropy decode, inverse transform, motion compensation, in-loop deblocking).1011 along with 120 Hz stereo 3D support,12 and is optimized to utilize less CPU processing power. UVD 3 also adds support for Blu-ray 3D stereoscopic displays.

UVD 4

UVD 4 includes improved frame interpolation with H.264 decoder.13 UVD 4.2 was introduced with the AMD Radeon Rx 200 series and Kaveri APU."X.ORG Radeon UVD (Unified Video Decoder) Hardware-UVD4.2: KAVERI, KABINI, MULLINS, BONAIRE, HAWAII". May 2016.

UVD 5

UVD 5 was introduced with the AMD Radeon R9 285. New to UVD is full support for 4K H.264 video, up to level 5.2 (4Kp60).14

UVD 6

The UVD 6.0 decoder and Video Coding Engine 3.0 encoder were reported to be first used in GPUs based on GCN 3, including Radeon R9 Fury series,1516 followed by AMD Radeon Rx 300 Series (Pirate Islands GPU family) and AMD Radeon Rx 400 Series (Arctic Islands GPU family).17 The UVD version in "Fiji" and "Carrizo"-based graphics controller hardware is also announced to provide support for High Efficiency Video Coding (HEVC, H.265) hardware video decoding, up to 4K, 8-bits color (H.265 version 1, main profile);181920 and there is support for the 10bit-color HDR both H.265 and VP9 video codec in the AMD Radeon 400 series with UVD 6.3.212223

UVD 7

The UVD 7.0 decoder and Video Coding Engine 4.0 encoder are included in the Vega-based GPUs.2425 But there is still no fixed function VP9 hardware decoding.26

UVD 7.2

AMD's Vega20 GPU, present in the Instinct Mi50, Instinct Mi60 and Radeon VII cards, include VCE 4.1 and two UVD 7.2 instances.2728

VCN 1

Main article: Video Core Next

Starting with the integrated graphics of the Raven Ridge APU (Ryzen 2200/2400G), the former UVD and VCE have been replaced by the new "Video Core Next" (VCN). VCN 1.0 adds full hardware decoding for the VP9 codec.29

Format support

3031

Unified Video Decoder and Video Core Next decoding/encoding support3233
ImplementationMPEG-134H.262(MPEG-2)H.263(MPEG-4 ASP)VC-1/WMV 9H.264(MPEG-4 AVC)35H.265(HEVC)VP9AV1JPEGMaximum resolutionColor depthAMD Fluid Motion
DecodingDecodingDecodingDecodingDecodingEncodingDecodingEncodingDecodingDecodingEncodingDecodingFrame interpolation
UVD 1.0RV610, RV630, RV670, RV620, RV635NoNoNoYesYesNoNoNoNoNoNoNo2K8-bitNo
UVD 2.0RS780, RS880, RV770
UVD 2.2RV710, RV730, RV740
UVD 2.3Cedar, Redwood, Juniper, Cypress
UVD 3.0Palm (Wrestler/Ontario), Sumo (Llano), Sumo2 (Llano)YesYesYes
UVD 3.1Barts, Turks, Caicos, Cayman, Seymour
UVD 3.2Aruba (Trinity/Richland), TahitiVCE36
UVD 4.0Cape Verde, PitcairnYes
UVD 4.2Kaveri, Kabini, Mullins, Bonaire, Hawaii
UVD 5.0Tonga4K
UVD 6.0Carrizo, FijiYesYes
UVD 6.2Stoney10-bit
UVD 6.3Polaris, VegaM, LexaVCE37
UVD 7.0Vega10, Vega12
UVD 7.2Vega20
VCN 1.0Raven, PicassoYesYesYes
VCN 2.0Navi10, Navi12, Navi14, Renoir, Cézanne8KNo
VCN 2.5Arcturus
VCN 2.6Aldebaran
VCN 3.0Navi24NoNo
Navi21, Navi22, Navi23YesYesYes
VCN 3.1.0Van Gogh???
VCN 3.1.1RembrandtNoNoNoNo8K10-bitNo
VCN 3.1.2Raphael???
VCN 4.0Navi 3xYes???
ImplementationDecodingDecodingDecodingDecodingDecodingEncodingDecodingEncodingDecodingDecodingEncodingDecodingMaximum resolutionColor depthFrame interpolation
MPEG-138H.262(MPEG-2)H.263(MPEG-4 ASP)VC-1/WMV 9H.264(MPEG-4 AVC)H.265(HEVC)VP9AV1JPEGAMD Fluid Motion

Availability

Most of the Radeon HD 2000 series video cards implement the UVD for hardware decoding of 1080p high definition contents.39 However, the Radeon HD 2900 series video cards do not include the UVD (though it is able to provide partial functionality through the use of its shaders), which was incorrectly stated to be present on the product pages and package boxes of the add-in partners' products before the launch of the Radeon HD 2900 XT, either stating the card as featuring ATI Avivo HD or explicitly UVD, which only the former statement of ATI Avivo HD is correct. The exclusion of UVD was also confirmed by AMD officials.40

UVD2 is implemented in the Radeon RV7x0 and R7x0 series GPUs. This also includes the RS7x0 series used for the AMD 700 chipset series IGP motherboards.

Feature overview

APUs

The following table shows features of AMD's processors with 3D graphics, including APUs (see also: List of AMD processors with 3D graphics).

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PlatformHigh, standard and low powerLow and ultra-low power
CodenameServerBasicToronto
MicroKyoto
DesktopPerformanceRaphaelPhoenix
MainstreamLlanoTrinityRichlandKaveriKaveri Refresh (Godavari)CarrizoBristol RidgeRaven RidgePicassoRenoirCezanne
Entry
BasicKabiniDalí
MobilePerformanceRenoirCezanneRembrandtDragon Range
MainstreamLlanoTrinityRichlandKaveriCarrizoBristol RidgeRaven RidgePicassoRenoirLucienneCezanneBarcelóPhoenix
EntryDalíMendocino
BasicDesna, Ontario, ZacateKabini, TemashBeema, MullinsCarrizo-LStoney RidgePollock
EmbeddedTrinityBald EagleMerlin Falcon,Brown FalconGreat Horned OwlGrey HawkOntario, ZacateKabiniSteppe Eagle, Crowned Eagle, LX-FamilyPrairie FalconBanded KestrelRiver Hawk
ReleasedAug 2011Oct 2012Jun 2013Jan 20142015Jun 2015Jun 2016Oct 2017Jan 2019Mar 2020Jan 2021Jan 2022Sep 2022Jan 2023Jan 2011May 2013Apr 2014May 2015Feb 2016Apr 2019Jul 2020Jun 2022Nov 2022
CPU microarchitectureK10PiledriverSteamrollerExcavator"Excavator+"41ZenZen+Zen 2Zen 3Zen 3+Zen 4BobcatJaguarPumaPuma+42"Excavator+"ZenZen+"Zen 2+"
ISAx86-64 v1x86-64 v2x86-64 v3x86-64 v4x86-64 v1x86-64 v2x86-64 v3
SocketDesktopPerformance—AM5——
Mainstream—AM4——
EntryFM1FM2FM2+FM2+43, AM4AM4—
Basic——AM1—FP5—
OtherFS1FS1+, FP2FP3FP4FP5FP6FP7FL1FP7 FP7r2 FP8FT1FT3FT3bFP4FP5FT5FP5FT6
PCI Express version2.03.04.05.04.02.03.0
CXL——
Fab. (nm)GF 32SHP(HKMG SOI)GF 28SHP(HKMG bulk)GF 14LPP(FinFET bulk)GF 12LP(FinFET bulk)TSMC N7(FinFET bulk)TSMC N6 (FinFET bulk)CCD: TSMC N5 (FinFET bulk)cIOD: TSMC N6(FinFET bulk)TSMC 4nm (FinFET bulk)TSMC N40(bulk)TSMC N28(HKMG bulk)GF 28SHP(HKMG bulk)GF 14LPP(FinFET bulk)GF 12LP(FinFET bulk)TSMC N6 (FinFET bulk)
Die area (mm2)22824624524525021044156180210CCD: (2x) 70cIOD: 12217875 (+ 28 FCH)107?125149~100
Min TDP (W)351712101565354.543.95106128
Max APU TDP (W)10095654517054182565415
Max stock APU base clock (GHz)33.84.14.13.73.83.63.73.84.03.34.74.31.752.222.23.22.61.23.352.8
Max APUs per node4511
Max core dies per CPU1211
Max CCX per core die1211
Max cores per CCX482424
Max CPU46 cores per APU481682424
Max threads per CPU core1212
Integer pipeline structure3+32+24+24+2+11+3+3+1+21+1+1+12+24+24+2+1
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF
IOMMU47—v2v1v2
BMI1, AES-NI, CLMUL, and F16C—
MOVBE—
AVIC, BMI2, RDRAND, and MWAITX/MONITORX—
SME48, TSME49, ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing——
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT——
MPK, VAES——
SGX——
FPUs per core10.5110.51
Pipes per FPU22
FPU pipe width128-bit256-bit80-bit128-bit256-bit
CPU instruction set SIMD levelSSE4a50AVXAVX2AVX-512SSSE3AVXAVX2
3DNow!3DNow!+——
PREFETCH/PREFETCHW
GFNI——
AMX—
FMA4, LWP, TBM, and XOP————
FMA3
AMD XDNA——
L1 data cache per core (KiB)64163232
L1 data cache associativity (ways)2488
L1 instruction caches per core10.5110.51
Max APU total L1 instruction cache (KiB)2561281922565122566412896128
L1 instruction cache associativity (ways)23482348
L2 caches per core10.5110.51
Max APU total L2 cache (MiB)424161212
L2 cache associativity (ways)168168
Max on-die L3 cache per CCX (MiB)—41632—4
Max 3D V-Cache per CCD (MiB)—64——
Max total in-CCD L3 cache per APU (MiB)4816644
Max. total 3D V-Cache per APU (MiB)—64——
Max. board L3 cache per APU (MiB)——
Max total L3 cache per APU (MiB)48161284
APU L3 cache associativity (ways)1616
L3 cache schemeVictimVictim
Max. L4 cache——
Max stock DRAM supportDDR3-1866DDR3-2133DDR3-2133, DDR4-2400DDR4-2400DDR4-2933DDR4-3200, LPDDR4-4266DDR5-4800, LPDDR5-6400DDR5-5200DDR5-5600, LPDDR5x-7500DDR3L-1333DDR3L-1600DDR3L-1866DDR3-1866, DDR4-2400DDR4-2400DDR4-1600DDR4-3200LPDDR5-5500
Max DRAM channels per APU21212
Max stock DRAM bandwidth (GB/s) per APU29.86634.13238.40046.93268.256102.40083.200120.00010.66612.80014.93319.20038.40012.80051.20088.000
GPU microarchitectureTeraScale 2 (VLIW5)TeraScale 3 (VLIW4)GCN 2nd genGCN 3rd genGCN 5th gen51RDNA 2RDNA 3TeraScale 2 (VLIW5)GCN 2nd genGCN 3rd gen52GCN 5th genRDNA 2
GPU instruction setTeraScale instruction setGCN instruction setRDNA instruction setTeraScale instruction setGCN instruction setRDNA instruction set
Max stock GPU base clock (MHz)60080084486611081250140021002400400538600?847900120060013001900
Max stock GPU base GFLOPS53480614.4648.1886.71134.517601971.22150.43686.4102.486???345.6460.8230.41331.2486.4
3D engine54Up to 400:20:8Up to 384:24:6Up to 512:32:8Up to 704:44:1655Up to 512:32:8768:48:8128:8:480:8:4128:8:4Up to 192:12:8Up to 192:12:4192:12:4Up to 512:?:?128:?:?
IOMMUv1IOMMUv2IOMMUv1?IOMMUv2
Video decoderUVD 3.0UVD 4.2UVD 6.0VCN 1.056VCN 2.157VCN 2.258VCN 3.1?UVD 3.0UVD 4.0UVD 4.2UVD 6.2VCN 1.0VCN 3.1
Video encoder—VCE 1.0VCE 2.0VCE 3.1—VCE 2.0VCE 3.4
AMD Fluid Motion
GPU power savingPowerPlayPowerTunePowerPlayPowerTune59
TrueAudio—60?—
FreeSync1212
HDCP61?1.42.22.3?1.42.22.3
PlayReady62—3.0 not yet—3.0 not yet
Supported displays632–32–433 (desktop)4 (mobile, embedded)42344
/drm/radeon646566——
/drm/amdgpu6768—69—70

GPUs

The following table shows features of AMD/ATI's GPUs (see also: List of AMD graphics processing units).

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Name of GPU seriesWonderMach3D RageRage ProRage 128R100R200R300R400R500R600RV670R700EvergreenNorthernIslandsSouthernIslandsSeaIslandsVolcanicIslandsArcticIslands/PolarisVegaNavi 1xNavi 2xNavi 3xNavi 4x
Released19861991Apr1996Mar1997Aug1998Apr2000Aug2001Sep2002May2004Oct2005May2007Nov2007Jun2008Sep2009Oct2010Dec2010Jan2012Sep2013Jun2015Jun 2016, Apr 2017, Aug 2019Jun 2017, Feb 2019Jul2019Nov2020Dec2022Feb2025
Marketing NameWonderMach3DRageRageProRage128Radeon7000Radeon8000Radeon9000RadeonX700/X800RadeonX1000RadeonHD 2000RadeonHD 3000RadeonHD 4000RadeonHD 5000RadeonHD 6000RadeonHD 7000Radeon200Radeon300Radeon400/500/600RadeonRX Vega, Radeon VIIRadeonRX 5000RadeonRX 6000RadeonRX 7000RadeonRX 9000
AMD support
Kind2D3D
Instruction set architectureNot publicly knownTeraScale instruction setGCN instruction setRDNA instruction set
MicroarchitectureNot publicly knownGFX1GFX2TeraScale 1(VLIW5)(GFX3)TeraScale 2(VLIW5)(GFX4)TeraScale 2(VLIW5) up to 68xx(GFX4)TeraScale 3(VLIW4) in 69xx 7172(GFX5)GCN 1stgen(GFX6)GCN 2ndgen(GFX7)GCN 3rdgen(GFX8)GCN 4thgen(GFX8)GCN 5thgen(GFX9)RDNA(GFX10.1)RDNA 2(GFX10.3)RDNA 3(GFX11)RDNA 4(GFX12)
TypeFixed pipeline73Programmable pixel & vertex pipelinesUnified shader model
Direct3D—5.06.07.08.19.011 (9_2)9.0b11 (9_2)9.0c11 (9_3)10.011 (10_0)10.111 (10_1)11 (11_0)11 (11_1)12 (11_1)11 (12_0)12 (12_0)11 (12_1)12 (12_1)11 (12_1)12 (12_2)
Shader model—1.42.0+2.0b3.04.04.15.05.15.16.56.76.8
OpenGL—1.11.21.32.174753.34.5767778794.6
Vulkan—1.180811.3821.483
OpenCL—Close to Metal1.1 (not supported by Mesa)1.2+ (on Linux: 1.1+ (no Image support on Clover, with by Rusticl) with Mesa, 1.2+ on GCN 1.Gen)2.0+ (Adrenalin driver on Win7+)(on Linux ROCm, Mesa 1.2+ (no Image support in Clover, but in Rusticl with Mesa, 2.0+ and 3.0 with AMD drivers or AMD ROCm), 5th gen: 2.2 win 10+ and Linux RocM 5.0+2.2+ and 3.0 Windows 8.1+ and Linux ROCm 5.0+ (Mesa Rusticl 1.2+ and 3.0 (2.1+ and 2.2+ wip))848586
HSA / ROCm—?
Video decoding ASIC—Avivo/UVDUVD+UVD 2UVD 2.2UVD 3UVD 4UVD 4.2UVD 5.0 or 6.0UVD 6.3UVD 7 8788VCN 2.0 8990VCN 3.0 91VCN 4.0VCN 5.0
Video encoding ASIC—VCE 1.0VCE 2.0VCE 3.0 or 3.1VCE 3.4VCE 4.0 9293
Fluid Motion 94?
Power saving?PowerPlayPowerTunePowerTune & ZeroCore Power?
TrueAudio—Via dedicated DSPVia shaders
FreeSync—12
HDCP95—?1.42.22.3 96
PlayReady97—3.03.0
Supported displays981–222–6?4
Max. resolution?2–6 ×2560×16002–6 ×4096×2160 @ 30 Hz2–6 ×5120×2880 @ 60 Hz3 ×7680×4320 @ 60 Hz 997680×4320 @ 60 Hz PowerColor7680x4320

@165 Hz

7680x4320
/drm/radeon100—
/drm/amdgpu101—Optional 102

Operating system support

The UVD SIP core needs to be supported by the device driver, which provides one or more interfaces such as VDPAU, VAAPI or DXVA. One of these interfaces is then used by end-user software, for example VLC media player or GStreamer, to access the UVD hardware and make use of it.

AMD Catalyst, AMD's proprietary graphics device driver that supports UVD, is available for Microsoft Windows and some Linux distributions. Additionally, a free device driver is available, which also supports the UVD hardware.

Linux

Support for UVD has been available in AMD's proprietary driver Catalyst version 8.10 since October 2008 through X-Video Motion Compensation (XvMC) or X-Video Bitstream Acceleration (XvBA).103104 Since April 2013,105 UVD is supported by the free and open-source "radeon" device driver through Video Decode and Presentation API for Unix (VDPAU). An implementation of VDPAU is available as Gallium3D state tracker in Mesa 3D.

On 28 June 2014, Phoronix published some benchmarks on using Unified Video Decoder through the VDPAU interface running MPlayer on Ubuntu 14.04 with version 10.3-testing of Mesa 3D.106

Windows

Microsoft Windows supported UVD since it was launched. UVD currently only supports DXVA (DirectX Video Acceleration) API specification for the Microsoft Windows and Xbox 360 platforms to allow video decoding to be hardware accelerated, thus the media player software also has to support DXVA to be able to utilize UVD hardware acceleration.

Others

Support for running custom FreeRTOS-based firmware on the Radeon HD 2400's UVD core (based on an Xtensa CPU), interfaced with a STM32 ARM-based board via I2C, was attempted as of January 2012.107

Predecessors and Successor

Predecessors

The Video Shader and ATI Avivo are similar technologies incorporated into previous ATI products.

Successor

Main article: Video Core Next

The UVD was succeeded by AMD Video Core Next in the Raven Ridge series of APUs released in October 2017. The VCN combines both encode (VCE) and decode (UVD).108

See also

Video hardware technologies

Nvidia

AMD

Intel

Qualcomm

Others

Notes

References

  1. "AMD A-Series APU block diagram". 2011-06-30. Retrieved 2015-01-22. http://www.abload.de/img/llano-blockdiagramm-95qhq1.jpg ↩

  2. "Linux operating system on Xtensa processors". http://www.linux-xtensa.org/ ↩

  3. Cheung, Ken (2009-01-08). "Consumer Electronics Show Features Tensilica-enabled Products". EDA Geek. Archived from the original on 2014-04-26. Retrieved 2014-05-15. https://web.archive.org/web/20140426202458/http://edageek.com/2009/01/08/tensilica-ces-2009/ ↩

  4. "Customer Profiles | Cadence IP". Ip.cadence.com. 2014-04-13. Retrieved 2014-05-15. http://ip.cadence.com/about/customer-profiles ↩

  5. "Tensilica News: Excellent AMD ATI Video with Xtensa". tensilica.com. 2009-10-05. Retrieved 2014-05-15. http://blog.tensilica.com/2009/10/excellent-amd-ati-video-with-xtensa.html ↩

  6. "ATI Licenses Tensilica's Xtensa Configurable Processor" (Press release). Business Wire. 2004-10-18. Retrieved 2014-05-15. http://www.businesswire.com/news/home/20041018005368/en/ATI-Licenses-Tensilicas-Xtensa-Configurable-Processor ↩

  7. "HardSpell review" (in Chinese). Archived from the original on September 27, 2007. https://web.archive.org/web/20070927060558/http://www.hardspell.com/pic/2007/4/30/9e955066-558b-490c-8d06-5cf935f72a79.jpg ↩

  8. Smith, Ryan (February 24, 2010). "AMD's Radeon HD 5450: The Next Step In HTPC Video Cards". AnandTech. AnandTech, Inc. p. 4. Retrieved April 7, 2010. Since deinterlacing and other AVIVO post-processing actions are done by the shader hardware, the limited shading capabilities of these cards meant that AMD couldn't offer the full suite of AVIVO abilities at once. http://www.anandtech.com/show/2931/4 ↩

  9. (in Chinese) PC-DVD discussion thread, retrieved August 23, 2008 http://www.pcdvd.com.tw/printthread.php?t=780017 ↩

  10. White Paper | AMD Unified Video Decoder (UVD) https://www.amd.com/Documents/UVD3_whitepaper.pdf ↩

  11. "DailyTech - Radeon 6800 Series Launches, Targets GeForce GTX 460". Archived from the original on 2012-03-20. Retrieved 2013-09-01. by Jansen Ng, 10/21/2010 DailyTech https://web.archive.org/web/20120320051101/http://www.dailytech.com/Radeon+6800+Series+Launches+Targets+GeForce+GTX+460/article19928.htm ↩

  12. "AMD A6-3650 Llano APU Review - Page 5". Hardwarecanucks.com. 2 August 2011. Retrieved 2014-04-17. http://www.hardwarecanucks.com/forum/hardware-canucks-reviews/45050-amd-a6-3650-llano-apu-review-5.html ↩

  13. Koen Crijns (14 January 2014). "AMD A10-7850K 'Kaveri' review: AMD's new APU". hardware.info. http://uk.hardware.info/reviews/5156/6/amd-a10-7850k-kaveri-review-amds-new-apu-extras-trueaudio-and-new-uvd ↩

  14. Ryan Smith. "GCN 1.2 – Image & Video Processing - AMD Radeon R9 285 Review: Feat. Sapphire R9 285 Dual-X OC". anandtech.com. http://www.anandtech.com/show/8460/amd-radeon-r9-285-review/4 ↩

  15. "Guide to HEVC_H.265 Encoding and Playback". TechSpot. 8 December 2016. http://www.techspot.com/article/1131-hevc-h256-enconding-playback/ ↩

  16. "Key features of AMD's third iteration of GCN architecture revealed | KitGuru". https://www.kitguru.net/components/graphic-cards/anton-shilov/key-features-of-amds-third-iteration-of-gcn-architecture-revealed/ ↩

  17. "[pull] amdgpu drm-next-4.2". 2015-06-03. Retrieved 2024-01-28. http://lists.freedesktop.org/archives/dri-devel/2015-June/084083.html ↩

  18. "Display Matters Virtual Super Resolution, Frame Rate Targeting, and HEVC Decoding - The AMD Radeon R9 Fury X Review Aiming For the Top". Anandtech. http://www.anandtech.com/show/9390/the-amd-radeon-r9-fury-x-review/8 ↩

  19. Andermahr, Wolfgang (24 June 2015). "AMD Radeon R9 Fury X im Test: Eine ernsthafte Alternative zu Nvidias Topmodellen (Seite 8)". ComputerBase. https://www.computerbase.de/2015-06/amd-radeon-r9-fury-x-test/ ↩

  20. Rick Merritt (2015-01-05). "AMD Describes Notebook Processor". EE Times. Retrieved 2015-01-10. http://www.eetimes.com/document.asp?doc_id=1325722 ↩

  21. AMD. "Radeon Software Crimson ReLive Edition 16.12.1 Release Notes". amd.com. Retrieved 2016-12-29. http://support.amd.com/en-us/kb-articles/Pages/Radeon-Software-Crimson-ReLive-Edition-16.12.1-Release-Notes.aspx ↩

  22. "AMD Introduces New Professional Graphics Vision and Strategy, Empowering the "Art of the Impossible"". AMD. https://www.amd.com/en-us/press-releases/Pages/amd-introduces-new-2016jul25.aspx ↩

  23. "AMD Launches the Radeon Rebellion with the Radeon™ RX 480 Graphics Card, Available Now". AMD. https://www.amd.com/en-us/press-releases/Pages/radeon-rx-480-2016jun29.aspx ↩

  24. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  25. Larabel, Michael (20 March 2017). "AMD Sends Out 100 Patches, Enabling Vega Support In AMDGPU DRM". Phoronix. Retrieved 25 August 2017. https://www.phoronix.com/scan.php?page=news_item&px=AMDGPU-Vega-10-Support ↩

  26. "Radeon's next-generation Vega architecture" (PDF). Archived from the original (PDF) on 2018-09-06. Retrieved 2024-01-28. https://web.archive.org/web/20180906124605/http://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf ↩

  27. Deucher, Alex (2018-05-15). "[PATCH 50/57] drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2". Retrieved 2019-01-13. https://lists.freedesktop.org/archives/amd-gfx/2018-May/022291.html ↩

  28. Deucher, Alex (2018-05-15). "[PATCH 42/57] drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files". Retrieved 2019-01-13. https://lists.freedesktop.org/archives/amd-gfx/2018-May/022282.html ↩

  29. "RadeonFeature". www.x.org. https://www.x.org/wiki/RadeonFeature/#index10h1 ↩

  30. "RadeonFeature". www.x.org. https://www.x.org/wiki/RadeonFeature/#index8h1 ↩

  31. "RadeonFeature". www.x.org. https://www.x.org/wiki/RadeonFeature/#index10h1 ↩

  32. "RadeonFeature". www.x.org. https://www.x.org/wiki/RadeonFeature/#index8h1 ↩

  33. "RadeonFeature". www.x.org. https://www.x.org/wiki/RadeonFeature/#index10h1 ↩

  34. All MPEG-2 decoders support MPEG-1 CPB ↩

  35. High 10 Profile encoding/decoding isn't supported ↩

  36. MPEG-4 AVC and HEVC encoding by separate Video Coding Engine /wiki/Video_Coding_Engine ↩

  37. MPEG-4 AVC and HEVC encoding by separate Video Coding Engine /wiki/Video_Coding_Engine ↩

  38. All MPEG-2 decoders support MPEG-1 CPB ↩

  39. HKEPC Hardware. "電腦領域 HKEPC Hardware - 全港 No.1 PC網站". hkepc.com. Archived from the original on 2007-03-12. https://web.archive.org/web/20070312110052/http://www.hkepc.com/bbs/itnews.php?tid=751990 ↩

  40. "DailyTech - Whoops, ATI Radeon HD 2900 XT Lacks UVD". dailytech.com. Archived from the original on 2013-12-24. https://web.archive.org/web/20131224161518/http://www.dailytech.com/Whoops+ATI+Radeon+HD+2900+XT+Lacks+UVD/article7447.htm ↩

  41. "AMD Announces the 7th Generation APU: Excavator mk2 in Bristol Ridge and Stoney Ridge for Notebooks". 31 May 2016. Retrieved 3 January 2020. https://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks ↩

  42. "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015. https://www.amd.com/en-us/press-releases/Pages/amd-mobile-carrizo-2014nov20.aspx ↩

  43. For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845. ↩

  44. "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017. https://www.techarp.com/guides/mobile-cpu-comparison-guide/5/ ↩

  45. A PC would be one node. ↩

  46. An APU combines a CPU and a GPU. Both have cores. ↩

  47. Requires firmware support. ↩

  48. Requires firmware support. ↩

  49. Requires firmware support. ↩

  50. No SSE4. No SSSE3. ↩

  51. "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017. http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ ↩

  52. "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017. http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ ↩

  53. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation. /wiki/Single-precision_floating-point_format ↩

  54. Unified shaders : texture mapping units : render output units /wiki/Unified_shader_model ↩

  55. Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018. https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3 ↩

  56. Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017. https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands ↩

  57. "AMD Ryzen 5000G 'Cezanne' APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package". wccftech. Aug 12, 2021. Retrieved August 25, 2021. https://wccftech.com/amd-ryzen-5000g-cezanne-apu-first-high-res-die-shots-10-7-billion-transistors/ ↩

  58. "AMD Ryzen 5000G 'Cezanne' APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package". wccftech. Aug 12, 2021. Retrieved August 25, 2021. https://wccftech.com/amd-ryzen-5000g-cezanne-apu-first-high-res-die-shots-10-7-billion-transistors/ ↩

  59. Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016 http://meseec.ce.rit.edu/551-projects/fall2014/3-4.pdf ↩

  60. "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014. http://semiaccurate.com/2014/01/15/technical-look-amds-kaveri-architecture/ ↩

  61. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  62. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  63. To feed more than two displays, the additional panels must have native DisplayPort support.[42] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed. /wiki/DisplayPort ↩

  64. DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  65. Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016. http://airlied.livejournal.com/68805.html ↩

  66. "Radeon feature matrix". freedesktop.org. Retrieved 10 January 2016. http://xorg.freedesktop.org/wiki/RadeonFeature/ ↩

  67. DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  68. Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016. http://www.x.org/wiki/Events/XDC2015/Program/deucher_zhou_amdgpu.pdf ↩

  69. Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org. https://lists.x.org/archives/xorg-announce/2016-November/002741.html ↩

  70. Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org. https://lists.x.org/archives/xorg-announce/2016-November/002741.html ↩

  71. "AMD Radeon HD 6900 (AMD Cayman) series graphics cards". HWlab. hw-lab.com. December 19, 2010. Archived from the original on August 23, 2022. Retrieved August 23, 2022. New VLIW4 architecture of stream processors allowed to save area of each SIMD by 10%, while performing the same compared to previous VLIW5 architecture http://web.archive.org/web/20220823180458/https://hw-lab.com/amd-radeon-hd-6900-series-amd-cayman.html/4 ↩

  72. "GPU Specs Database". TechPowerUp. Retrieved August 23, 2022. https://www.techpowerup.com/gpu-specs/?generation=Northern%20Islands&architecture=TeraScale%203&sort=generation ↩

  73. The Radeon 100 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders. /wiki/Radeon_R100_series#R100's_pixel_shaders ↩

  74. R300, R400 and R500 based cards do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power of two (NPOT) textures. ↩

  75. "NPOT Texture (OpenGL Wiki)". Khronos Group. Retrieved February 10, 2021. https://www.khronos.org/opengl/wiki/NPOT_Texture ↩

  76. "AMD Radeon Software Crimson Edition Beta". AMD. Retrieved 2018-04-20. https://support.amd.com/en-us/kb-articles/pages/amd-radeon-software-crimson-edition-beta.aspx ↩

  77. "Mesamatrix". mesamatrix.net. Retrieved 2018-04-22. https://mesamatrix.net/ ↩

  78. "RadeonFeature". X.Org Foundation. Retrieved 2018-04-20. https://www.x.org/wiki/RadeonFeature/ ↩

  79. OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware. ↩

  80. OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware. ↩

  81. Vulkan support is theoretically possible but has not been implemented in a stable driver. ↩

  82. "Conformant Products". Khronos Group. Retrieved 2024-12-02. https://www.khronos.org/conformance/adopters/conformant-products#submission_820 ↩

  83. "radv: add Vulkan 1.4 support". Mesa. Retrieved 2024-12-02. https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32432 ↩

  84. "AMD Radeon RX 6800 XT Specs". TechPowerUp. Retrieved January 1, 2021. https://www.techpowerup.com/gpu-specs/radeon-rx-6800-xt.c3694 ↩

  85. "AMD Launches The Radeon PRO W7500/W7600 RDNA3 GPUs". Phoronix. 3 August 2023. Retrieved 4 September 2023. https://www.phoronix.com/news/AMD-Radeon-PRO-W7500-W7600 ↩

  86. "AMD Radeon Pro 5600M Grafikkarte". TopCPU.net (in German). Retrieved 4 September 2023. https://www.topcpu.net/de/cpu/Radeon-Pro-5600M ↩

  87. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  88. The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega. /wiki/Ryzen#Raven_Ridge ↩

  89. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  90. The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega. /wiki/Ryzen#Raven_Ridge ↩

  91. Larabel, Michael (September 15, 2020). "AMD Radeon Navi 2 / VCN 3.0 Supports AV1 Video Decoding". Phoronix. Retrieved January 1, 2021. https://www.phoronix.com/scan.php?page=news_item&px=AV1-Decode-For-AMD-VCN-3.0 ↩

  92. Killian, Zak (March 22, 2017). "AMD publishes patches for Vega support on Linux". Tech Report. Retrieved March 23, 2017. https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux ↩

  93. The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega. /wiki/Ryzen#Raven_Ridge ↩

  94. Video processing for video frame rate interpolation technique. In Windows it works as a DirectShow filter in your player. In Linux, there is no support on the part of drivers and / or community. ↩

  95. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  96. Edmonds, Rich (February 4, 2022). "ASUS Dual RX 6600 GPU review: Rock-solid 1080p gaming with impressive thermals". Windows Central. Retrieved November 1, 2022. https://www.windowscentral.com/asus-dual-rx-6600-gpu-review ↩

  97. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup. ↩

  98. More displays may be supported with native DisplayPort connections, or splitting the maximum resolution between multiple monitors with active converters. /wiki/DisplayPort ↩

  99. "Radeon's next-generation Vega architecture" (PDF). Radeon Technologies Group (AMD). Archived from the original (PDF) on September 6, 2018. Retrieved June 13, 2017. https://web.archive.org/web/20180906124605/http://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf ↩

  100. DRM (Direct Rendering Manager) is a component of the Linux kernel. AMDgpu is the Linux kernel module. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  101. DRM (Direct Rendering Manager) is a component of the Linux kernel. AMDgpu is the Linux kernel module. Support in this table refers to the most current version. /wiki/Direct_Rendering_Manager ↩

  102. "AMDGPU". Retrieved December 29, 2023. https://wiki.gentoo.org/wiki/AMDGPU ↩

  103. "UVD Is Enabled For Linux In Catalyst 8.10". Phoronix. 2008-10-15. Retrieved 2015-01-22. https://www.phoronix.com/scan.php?page=news_item&px=Njc4Ng ↩

  104. "AMD's X-Video Bitstream Acceleration". Phoronix. 2008-10-28. Retrieved 2015-01-22. https://www.phoronix.com/scan.php?page=article&item=amd_xvmc_xvba&num=1 ↩

  105. "AMD Releases Open-Source UVD Video Support". Phoronix. 2013-04-02. Retrieved 2015-01-22. https://www.phoronix.com/scan.php?page=article&item=amd_opensource_uvd&num=1 ↩

  106. "AMD Radeon VDPAU Video Performance With Gallium3D". Phoronix. 2014-06-28. Retrieved 2015-01-22. https://www.phoronix.com/scan.php?page=article&item=amd_gallium3d_vdpau&num=1 ↩

  107. "Interfacing a PC graphics card (Radeon HD 2400) with a STM32 microcontroller". Edaboard.com. 2012-01-09. Retrieved 2014-04-27. http://www.edaboard.com/thread236934.html ↩

  108. Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands In Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017. https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands ↩