• Images
• Videos
• Documents
• Books
• Articles

History

Fort Knox

In the early 1980s, IBM management became concerned that IBM's large number of incompatible midrange computer systems was hurting the company's competitiveness, particularly against Digital Equipment Corporation's VAX.¹¹ In 1982, a project named Fort Knox commenced, which was intended to consolidate the System/36, the System/38, the IBM 8100, the Series/1 and the IBM 4300 series into a single product line based around an IBM 801-based processor codenamed Iliad, while retaining backwards compatibility with all the systems it was intended to replace.[11] A new operating system would be created for Fort Knox, but the operating systems of each platform which Fort Knox was intended to replace would also be ported to the Iliad processor to allow customers to migrate their software to the new platform.

The Fort Knox project proved to be overly ambitious and ran into multiple delays and changes of scope. As the project advanced, the requirement to support IBM 8100 and Series/1 software was dropped.¹² When IBM's engineers attempted to port the operating systems and software of their existing platforms, they discovered that it would be impossible without making extensive changes to the Iliad processor for each individual operating system — changes that Iliad's architects were unwilling to make.[11] The proposed solution to this was to augment Iliad with operating system-specific co-processors that provided hardware support for a single operating system. However, the amount of logic needed in each co-processor grew until the co-processors became the main processor, and the Iliad was relegated to the role of a support processor — thus failing the goal of consolidating on a single processor architecture. The Fort Knox project was ultimately cancelled in 1985.

Silverlake

During the Fort Knox project, a skunkworks project was started at IBM Rochester by engineers who believed that Fort Knox's failure was inevitable. These engineers developed code that allowed System/36 applications to run on top of the System/38,¹³ and when Fort Knox was cancelled, this skunkworks project evolved into an official project to replace both the System/36 and System/38 with a single new hardware platform.[13] The project became known as Silverlake (named for Silver Lake in Rochester, Minnesota) and officially began in December 1985.¹⁴ The Silverlake hardware was essentially an evolution of the System/38 that reused some of the technology developed for the Fort Knox project.¹⁵¹⁶

Silverlake's goal was to deliver a replacement for the System/36 and System/38 in as short a timeframe as possible, as the Fort Knox project had stalled new product development at Rochester, leaving IBM without a competitive midrange system.¹⁷ On its launch in 1986, the System/370-compatible IBM 9370 was positioned as IBM's preferred midrange platform, but failed to achieve the commercial success IBM hoped it would have.[11]¹⁸ Much like Silverlake, the 9370 also reused the co-processor developed during the Fort Knox project as its main processor and the same SPD I/O bus that was derived from the Series/1 bus.[11]

AS/400

On June 21, 1988, IBM officially announced the Silverlake system as the Application System/400 (AS/400). The announcement included more than 1,000 software packages written for it by IBM and IBM Business Partners.¹⁹ The AS/400 operating system was named Operating System/400 (OS/400).²⁰

The creators of the AS/400 originally planned to use the name System/40, but IBM had adopted a new product nomenclature around the same time, which led to the Application System/400 name.[13] First, IBM began prefixing "System" in product names with words to indicate the intended use or target market of the system (e.g., Personal System/2 and Enterprise System/9000). Second, IBM decided to reserve one- and two-digit model numbers for personal systems (e.g., PS/2 and PS/55), three-digit numbers for midrange systems (e.g., AS/400) and four-digit numbers for mainframes (e.g., ES/9000). The reassignment of two-digit model numbers from midrange systems to personal systems was to prevent the personal systems from running out of single-digit numbers for new products.

The move to PowerPC

See also: IBM RS64 § History

In 1990, IBM Rochester began work to replace the AS/400's original System/38-derived 48-bit CISC processors with a 96-bit architecture known as C-RISC (Commercial RISC).[11] Rather than being a clean-slate design, C-RISC would have added RISC-style and VLIW-style instructions to the AS/400's processor, while maintaining backwards compatibility with the System/370-style Internal Microprogrammed Interface (IMPI) instruction set and the microcode used to implement it.

In 1991, at the request of IBM president Jack Kuehler, a team under the leadership of Frank Soltis delivered a proposal to adapt the 64-bit PowerPC architecture to support the needs of the AS/400 platform.²¹ Their extensions to the PowerPC architecture, known as Amazon (and later as PowerPC AS), were approved by IBM management instead of the C-RISC design for development into the next AS/400 processor architecture.²² These extensions include support for tagged memory,²³ as well as assistance for decimal arithmetic.²⁴

IBM initially attempted to create a single PowerPC implementation for both AS/400 and high-end RS/6000 systems known as Belatrix.[11] The Belatrix project proved to be too ambitious, and was cancelled when it became apparent that it would not deliver on schedule. Instead, a pair of AS/400-specific processors were designed at IBM Endicott and IBM Rochester, known as Cobra (for low end systems) and Muskie (for high end systems) respectively. These became the initial implementations of the IBM RS64 processor line. The RS64 series continued to be developed as a separate product line at IBM until the POWER4 merged both the RS64 and POWER product lines together.[13]

Despite the move from IMPI to an entirely different processor architecture, the AS/400's Technology Independent Machine Interface (TIMI) mostly hid the changes from users and applications, and transparently recompiled applications for the new processor architecture.²⁵ The port of OS/400 to the PowerPC AS architecture required a rewrite of most of the code below the TIMI due to the use of IMPI microcode to implement significant quantities of the operating system's low level code.[13] This led to the creation of the System Licensed Internal Code (SLIC) - a new implementation of the lower levels of the operating system mostly written in C++.

Rebranding

The AS/400 family line was rebranded several times in the 1990s and 2000s as IBM introduced newer generations of hardware and operating system.²⁶

In 1994, the AS/400 Advanced Series name was used for new models, followed by the rebranding of the product line to AS/400e (the e standing for e-business) in 1997.[13]

In 2000, the eServer iSeries was introduced as part of its eServer branding initiative.²⁷ The eServer iSeries was built on the POWER4 processor from the RS64 processors used by previous generations, meaning that the same processors were used in both the iSeries and pSeries platforms, the latter of which ran AIX.

In 2004, eServer i5 (along with OS/400 becoming i5/OS) the 5 signifying the use of POWER5 processors, was introduced, replacing the eServer iSeries brand.²⁸ Successive generations of iSeries and pSeries hardware converged until they were essentially the same hardware sold under different names and with different operating systems.²⁹ Some i5 servers were still using the AS/400-specific IBM Machine Type (MT/M 9406-520) and were able to run AIX in a logical partition along i5/OS, while the p5 servers were able to run i5/OS, respectively. The licensing for AIX and i5/OS was controlled in the firmware by the POWER hypervisor.

The final rebranding occurred in 2006, when IBM rebranded the eServer i5 to System i.³⁰

In April 2008, IBM introduced the IBM Power Systems line, which was a convergence of System i and System p product lines.³¹ The first Power Systems machines used the POWER6 processors; i5/OS was renamed as IBM i in order to remove the association with POWER5 processors.³² IBM i is sold as one of the operating system options for Power Systems (along with AIX and Linux) instead of being tied to its own hardware platform.

Legacy

Although announced in 1988, the AS/400 remains IBM's most recent major architectural shift that was developed wholly internally. After the departure of CEO John Akers in 1993, when IBM looked likely to be split up, Bill Gates commented that the only part of IBM that Microsoft would be interested in was the AS/400 division. (At the time, many of Microsoft's business and financial systems ran on the AS/400 platform, rumored as ending around 1999 with the introduction of Windows 2000.³³³⁴³⁵)

System architecture

According to Frank Soltis, one of the architects of the AS/400 platform, the AS/400's architecture is defined by five architectural principles. Most of these principles are inherited from System/38.³⁶

Technology Independence

The high-level instruction set (called TIMI for "Technology Independent Machine Interface" by IBM) allows application programs to take advantage of advances in hardware and software without recompilation. TIMI is a virtual instruction set independent of the underlying machine instruction set of the CPU. User-mode programs contain both TIMI instructions and the machine instructions of the CPU, thus ensuring hardware independence. This is conceptually somewhat similar to the virtual machine architecture of programming environments such as Java and .NET.

Unlike some other virtual-machine architectures in which the virtual instructions are interpreted at run time, TIMI instructions are never interpreted. They constitute an intermediate compile time step and are translated into the processor's instruction set as the final compilation step. The TIMI instructions are stored within the final program object, in addition to the executable machine instructions. This is how application objects compiled on one processor family (e.g., the original CISC AS/400 48-bit processors) could be moved to a new processor (e.g., PowerPC 64-bit) without re-compilation. An application saved from the older 48-bit platform can simply be restored onto the new 64-bit platform where the operating system discards the old machine instructions and re-translates the TIMI instructions into 64-bit instructions for the new processor.

The system's instruction set defines all pointers as 128-bit. This was the original design feature of the System/38 (S/38) in the mid-1970s planning for future use of faster processors, memory, and an expanded address space. The original AS/400 CISC models used the same 48-bit address space as the S/38. The address space was expanded in 1995 when the RISC PowerPC RS64 64-bit CPU processor replaced the 48-bit CISC processor.

Software integration

Main article: IBM i

OS/400 (now known as IBM i) is the native operating system of the AS/400 platform and was the sole operating system supported on the original AS/400 hardware. Many of the advanced features associated with the AS/400 are implemented in the operating system as opposed to the underlying hardware, which changed significantly throughout the life of the AS/400 platform. Features include a RDBMS (Db2 for i), a menu-driven interface, support for multiple users, block-oriented terminal support (IBM 5250), and printers.

Object-based design

Unlike the "everything is a file" principle of Unix and its derivatives, on IBM i everything is an object (with built-in persistence and garbage collection).

Single-level store

IBM uses a single-level store virtual memory architecture in the AS/400 platform. For 64-bit PowerPC processors, the virtual address resides in the rightmost 64 bits of a pointer while it was 48 bits in the S/38 and CISC AS/400. The 64-bit address space references main memory and disk as a single address set, which is the single-level store concept.

Hardware integration

Later generations of hardware are also capable of supporting various guest operating systems, including SSP, AIX, Linux, Microsoft Windows 2000, and Windows Server 2003. While OS/400, AIX, and Linux are supported on the POWER processors on LPARs (logical partitions), Windows is supported with either single-processor internal blade servers (IXS) or externally linked multiple-processor servers (IXA and iSCSI). SSP guests were supported using emulation from OS/400 V3R6 through V4R4 using the Advanced 36 Machine facility of the operating system, a feature distinct from the System/36 Environment compatibility layer, which requires System/36 software to be recompiled.

Hardware

CPUs

System models

See also

Notes

• Soltis, Frank (1997). Inside the AS/400 - Featuring the AS400e series (2nd ed.). Duke Press. ISBN 978-1-882419-66-1.
• Soltis, Frank (2001). Fortress Rochester: the Inside Story of the IBM iSeries. 29th Street Press. ISBN 978-1583040836.

External links

• Official website at the Wayback Machine (archived 2000-03-02)
• IBM's Power Systems product page
• "IBM System i models". All products / POWER5. IBM. 2021-03-04. Retrieved February 26, 2025.
• IBM Archives: A Brief History of the IBM AS/400 and iSeries at the Wayback Machine (archived 2006-05-03)
• AS/400 Advanced Series Handbook (PDF)
• The IBM AS400 A technical introduction at the Wayback Machine (archived 2016-03-03)

References

1. Elms, Teresa (29 April 1991). "Side road to success". Computerworld. p. 27. https://books.google.com/books?id=IvFeiX1fIzgC&pg=PA27 ↩

2. Korzenioski, Paul (14 February 1994). "AS/400 in the LAN environment". InfoWorld. p. 52. https://books.google.com/books?id=7DoEAAAAMBAJ&pg=PA52 ↩

3. IBM (23 January 2003). "IBM AS/400". IBM.com. International Business Machines Corporation. Retrieved 20 March 2022. https://www.ibm.com/ibm/history/exhibits/rochester/rochester_4010.html ↩

4. Upward compatible from the Machine Interface (MI) of the S/38 /wiki/IBM_System/38#_Machine_Interface ↩

5. David McKenzie. "Notes for storage research". Archived from the original on October 8, 1999. https://web.archive.org/web/19991008185025/http://users.snip.net/~gbooker/AS400/arch.htm ↩

6. Soltis, Frank G. "When Is PowerPC Not PowerPC?". The 400 Squadron. Archived from the original on January 8, 2008. https://web.archive.org/web/20080108195918/http://www.the400squadron.com/amug/200406/NotPowerPC.htm ↩

7. Timothy Prickett-Morgan (2008-04-07). "Bye Bye System p and i, Hello Power Systems". IT Jungle. Retrieved 2021-10-09. https://www.itjungle.com/2008/03/17/tfh031708-story01/ ↩

8. Niccolai, James (April 2, 2008). "IBM merges System i and System p server lines". InfoWorld. https://www.infoworld.com/article/2649318/ibm-merges-system-i-and-system-p-server-lines.html ↩

9. Timothy Prickett Morgan (2008-04-07). "It's Official: Now We're Power Systems and i for Business". itjungle.com. Retrieved 2021-03-15. https://www.itjungle.com/2008/04/07/tfh040708-story01/ ↩

10. Alex Woodie (2017-07-17). "Of Course i's Not The AS/400". IT Jungle. Retrieved 2021-11-22. https://www.itjungle.com/2017/07/17/course-not-as400/ ↩

11. Roy A. Bauer; Emilio Collar; Victor Tang (1992). The Silverlake Project: Transformation at IBM. Oxford University Press. ISBN 9780195067545. 9780195067545 ↩

12. Schleicher, David L. (2006-01-24). "An Interview with DAVID L. SCHLEICHER" (PDF). conservancy.umn.edu (Interview). Interviewed by Arthur L. Norberg. Charles Babbage Institute. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-05. https://conservancy.umn.edu/bitstream/handle/11299/107623/oh381ds.pdf ↩

13. Schleicher, David L. (2006-01-24). "An Interview with DAVID L. SCHLEICHER" (PDF). conservancy.umn.edu (Interview). Interviewed by Arthur L. Norberg. Charles Babbage Institute. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-05. https://conservancy.umn.edu/bitstream/handle/11299/107623/oh381ds.pdf ↩

14. Tom Huntington (2018-06-21). "Happy 30th Anniversary, IBM i!". helpsystems.com. Archived from the original on 2021-04-20. Retrieved 2021-03-05. https://web.archive.org/web/20210420033243/https://www.helpsystems.com/blog/happy-30th-anniversary-ibm-i ↩

15. Schleicher, David L. (2006-01-24). "An Interview with DAVID L. SCHLEICHER" (PDF). conservancy.umn.edu (Interview). Interviewed by Arthur L. Norberg. Charles Babbage Institute. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-05. https://conservancy.umn.edu/bitstream/handle/11299/107623/oh381ds.pdf ↩

16. "Silverlake". wiki.midrange.com. 2006-08-21. Retrieved 2021-03-06. https://wiki.midrange.com/index.php/Silverlake ↩

17. Eric J. Wieffering (1992-05-23). "The brave new world of IBM Rochester". postbulletin.com. Retrieved 2021-03-06. https://www.postbulletin.com/the-brave-new-world-of-ibm-rochester-by-eric-j/article_dca93382-06b2-5f8a-8c4a-a42b58334432.html ↩

18. Christine Winter (1988-06-20). "NEW IBM MIDRANGE TO DEBUT". Chicago Tribune. https://www.chicagotribune.com/news/ct-xpm-1988-06-20-8801090224-story.html ↩

19. IBM (23 January 2003). "IBM AS/400". IBM. International Business Machines Corporation. Retrieved 19 March 2022. https://www.ibm.com/ibm/history/exhibits/rochester/rochester_4010.html ↩

20. Schleicher, David L. (2006-01-24). "An Interview with DAVID L. SCHLEICHER" (PDF). conservancy.umn.edu (Interview). Interviewed by Arthur L. Norberg. Charles Babbage Institute. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-05. https://conservancy.umn.edu/bitstream/handle/11299/107623/oh381ds.pdf ↩

21. John Paul Shen; Mikko H. Lipasti (30 July 2013). Modern Processor Design: Fundamentals of Superscalar Processors. Waveland Press. ISBN 978-1-4786-1076-2. 978-1-4786-1076-2 ↩

22. Adam T. Stallman; Frank G. Soltis (July 1, 1995). "Inside the PowerPC AS". System iNEWS Magazine. Archived from the original on August 31, 2013. https://web.archive.org/web/20130831203807/http://iprodeveloper.com/systems-management/inside-powerpc ↩

23. Landau, Hugo. "The PowerPC AS Tagged Memory Extensions". https://www.devever.net/~hl/ppcas ↩

24. McKenzie, Dave (December 5, 2000). "Re: Packed decimals". Newsgroup: comp.arch. Usenet: [email protected]. https://groups.google.com/g/comp.arch/c/TgbBBxCdK0E/m/HlmFfkymuPcJ ↩

25. Tom Van Looy (January 2009). "The IBM AS/400: A technical introduction" (PDF). scss.tcd.ie. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-13. https://www.scss.tcd.ie/SCSSTreasuresCatalog/hardware/TCD-SCSS-T.20121208.068/IBM-AS400-technical-introduction.pdf ↩

26. Tom Van Looy (January 2009). "The IBM AS/400: A technical introduction" (PDF). scss.tcd.ie. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-13. https://www.scss.tcd.ie/SCSSTreasuresCatalog/hardware/TCD-SCSS-T.20121208.068/IBM-AS400-technical-introduction.pdf ↩

27. "IBM eServer iSeries 400". IBM. October 3, 2000. https://www-01.ibm.com/common/ssi/rep_ca/9/897/ENUS100-309/index.html ↩

28. Denny Insell (2004). "Introducing IBM eServer i5 & i5/OS" (PDF). IBM. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-14. https://www.gateway400.org/documents/Gateway400/Handouts/2004%20IBM%20eServer%20i5%20Exec%20Overview%2009-09-2004%20St%20Louis%20MOL.pdf ↩

29. Timothy Prickett-Morgan (2008-04-07). "Bye Bye System p and i, Hello Power Systems". IT Jungle. Retrieved 2021-10-09. https://www.itjungle.com/2008/03/17/tfh031708-story01/ ↩

30. Alex Woodie (2017-10-11). "IBM i Slow to Catch On, But What Does It Mean?". itjungle.com. Retrieved 2021-03-15. https://www.itjungle.com/2017/10/11/ibm-slow-catch-mean/ ↩

31. Niccolai, James (April 2, 2008). "IBM merges System i and System p server lines". InfoWorld. https://www.infoworld.com/article/2649318/ibm-merges-system-i-and-system-p-server-lines.html ↩

32. "IBM Introduces the First in a New Generation of Power Systems". IBM. 2008-04-02. Archived from the original on May 11, 2008. Retrieved 2021-03-15. https://web.archive.org/web/20080511231914/http://www-03.ibm.com/press/us/en/pressrelease/23795.wss ↩

33. Microsoft TechNet. "AS/400s extinct at Microsoft since 1999". Google discussion group, Microsoft runs AS/400's in-house - Article?. Retrieved 2007-05-16. https://groups.google.com/forum/#!msg/comp.sys.ibm.as400.misc/D8i3fBO1t1Q/uA7O-sncl-QJ ↩

34. "Disparition des systèmes AS/400 chez Microsoft depuis mai 1999". Archived from the original on 2012-11-06. Retrieved 2013-01-02. https://web.archive.org/web/20121106083645/http://technet.microsoft.com/fr-fr/library/bb967337.aspx ↩

35. "Microsoft Uses the iSeries to Run its Business". Blogspot, Confessions of An iSeries Priest. 5 March 2006. Retrieved 2006-03-05. http://iseriespriest.blogspot.com/2006/03/microsoft-uses-iseries-to-run-its.html ↩

36. Soltis (2001), p. 1–5, 97–177. - Soltis, Frank (2001). Fortress Rochester: the Inside Story of the IBM iSeries. 29th Street Press. ISBN 978-1583040836. https://books.google.com/books?id=ypJmzqt7JdUC ↩

37. There were at least two generations of IMPI processors, the second was released in 1991.[32] ↩

38. "The processor clock cycle is 45 ns worst case."[32] ↩

39. "AS/400e System Handbook" (PDF). IBM. 1999-08-03. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-21. http://www.hen-sch.de/books/AS400%20System%20Handbook%20V4R4M0.pdf ↩

40. IBM.com. "V4R3 Questions and Answers". Reference # 8625668200695613. Retrieved 2007-04-04.[permanent dead link] http://www-1.ibm.com/support/docview.wss?rs=0&context=SWG60&dc=DB520&dc=D900&dc=D800&dc=DA900&dc=DA800&q1=v4r2+odbc+AND+AS400KBXXYYZZRCH&uid=nas18bc661f3c0132fee8625668200695613&loc=en_US&cs=UTF-8&lang=all ↩

41. "Family 9406+05 IBM eServer iSeries Models 820, 830, and 840". 12 May 2020. https://www-01.ibm.com/common/ssi/ShowDoc.wss?docURL=/common/ssi/rep_sm/5/897/ENUS9406-_h05/index.html&request_locale=en ↩

42. "IBM AS/400E MIDDLE-TIER SERVERS...FOR EXTREME BUSINESS". www.ibm.com. 2000-06-12. Retrieved 2021-11-29. https://www.ibm.com/common/ssi/rep_ca/8/897/ENUS100-178/index.html ↩