Physical Address Extension

<p>In <a href="/facts/Computing/Kghtm9fX">computing</a>, Physical Address Extension (PAE), sometimes referred to as Page Address Extension,
is a memory management feature for the x86 architecture. PAE was first introduced by Intel in the <a href="/facts/Pentium_Pro/mTAN64fo">Pentium Pro</a>, and later by AMD in the <a href="/facts/Athlon/3BFQu05f">Athlon</a> processor. It defines a <a href="/facts/Page_table/0IBU5cwg">page table</a> hierarchy of three levels (instead of two), with table entries of 64 bits each instead of 32, allowing these CPUs to directly access a physical <a href="/facts/Address_space/EscyYKkP">address space</a> larger than 4 <a href="/facts/Gigabyte/s2hb2SEg">gigabytes</a> (232 bytes).
</p><p>The page table structure used by <a href="/facts/X86-64/cyWvUFlP">x86-64</a> CPUs when operating in <a href="/facts/Long_mode/ITshSuE6">long mode</a> further extends the page table hierarchy to four or more levels, extending the virtual address space, and uses additional physical address bits at all levels of the page table, extending the physical address space. It also uses the topmost bit of the 64-bit page table entry as a no-execute or <a href="/facts/NX_bit/MnBB93BK">"NX" bit</a>, indicating that code cannot be executed from the associated page. The NX feature is also available in <a href="/facts/X86-64/cyWvUFlP">protected mode</a> when these CPUs are running a 32-bit operating system, provided that the operating system enables PAE.
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Physical Address Extension