Minimal instruction set computer

Minimal instruction set computer (MISC) is a <a href="/facts/Central_processing_unit/Jxp1bqMV">central processing unit</a> (CPU) architecture, usually in the form of a <a href="/facts/Microprocessor/Fx9CaQht">microprocessor</a>, with a very small number of basic operations and corresponding <a href="/facts/Opcode/UaLMp56C">opcodes</a>, together forming an <a href="/facts/Instruction_set/8p8vwUeE">instruction set</a>. Such sets are commonly <a href="/facts/Stack_(abstract_data_type)/bj7l94v1">stack-based</a> rather than <a href="/facts/Processor_register/32RvbUdz">register-based</a> to reduce the size of <a href="/facts/Operand/HSuUzrKz">operand</a> specifiers.
Such a <a href="/facts/Stack_machine/IBtk4NRA">stack machine</a> architecture is inherently simpler since all instructions operate on the top-most stack entries.
One result of the stack architecture is an overall smaller instruction set, allowing a smaller and faster instruction decode unit with overall faster operation of individual instructions.

Minimal instruction set computer open-in-new

Minimal instruction set computer