Menu
Home
People
Places
Arts
History
Plants & Animals
Science
Life & Culture
Technology
Reference.org
Sum-addressed decoder
open-in-new
<p>In <a href="/facts/CPU_design/HeNbj78g">CPU design</a>, the use of a sum-addressed decoder (SAD) or sum-addressed memory (SAM) decoder is a method of reducing the latency of the <a href="/facts/CPU_cache/x8BYFcdv">CPU cache</a> access and address calculation (base + offset). This is achieved by fusing the address generation sum operation with the decode operation in the cache <a href="/facts/Static_random_access_memory/Pmyo4V5e">SRAM</a>. </p>