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Serial communication
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<h2 id="cables">Cables</h2> <p>Many serial communication systems were originally designed to transfer data over relatively large distances through some sort of <a href="/facts/Data_cable/Sxg7NdB8">data cable</a>. </p><p>Practically all long-distance communication transmits data one bit at a time, rather than in parallel, because it reduces the cost of the cable. The cables that carry this data (other than "the" serial cable) and the <a href="/facts/Computer_port_(hardware)/87F2NcNc">computer ports</a> they plug into are usually referred to with a more specific name, to reduce confusion. </p><p>Keyboard and mouse cables and ports are almost invariably serial—such as <a href="/facts/PS%2f2_port/43gxjWdS">PS/2 port</a>, <a href="/facts/Apple_Desktop_Bus/h7frV8FV">Apple Desktop Bus</a> and <a href="/facts/USB/XcIKWLyg">USB</a>. </p><p>The cables that carry digital video are also mostly serial—such as <a href="/facts/Coax_cable/aG9FfCpL">coax cable</a> plugged into a <a href="/facts/HD-SDI/T9VlXM56">HD-SDI</a> port, a <a href="/facts/Webcam/1vTYrHWw">webcam</a> plugged into a USB port or <a href="/facts/IEEE_1394/XYdQlxfy">FireWire port</a>, <a href="/facts/Ethernet_cable/nMfhU8tU">Ethernet cable</a> connecting an <a href="/facts/IP_camera/45X46Bgf">IP camera</a> to a <a href="/facts/Power_over_Ethernet/m9XQhn3L">Power over Ethernet</a> port, <a href="/facts/FPD-Link/IUs0RIsG">FPD-Link</a>, digital telephone lines (ex. <a href="/facts/ISDN/zcV99rUb">ISDN</a>), etc. </p><p>Other such cables and ports, transmitting data one bit at a time, include <a href="/facts/Serial_ATA/dW8yAMm8">Serial ATA</a>, <a href="/facts/SCSI_connector/HwFJT7nM">Serial SCSI</a>, Ethernet cable plugged into <a href="/facts/Ethernet_port/nMfhU8tU">Ethernet ports</a>, the <a href="/facts/Display_Data_Channel/2lclVrQm">Display Data Channel</a> using previously reserved pins of the <a href="/facts/VGA_connector/FI7TpsL6">VGA connector</a> or the <a href="/facts/DVI_port/Dpnu9JmB">DVI port</a> or the <a href="/facts/HDMI/HuNwzm04">HDMI</a> port. </p> <h2 id="serial-buses">Serial buses</h2> <p>Many communication systems were generally designed to connect two integrated circuits on the same <a href="/facts/Printed_circuit_board/muSR2p43">printed circuit board</a>, connected by <a href="/facts/Signal_trace/zDcDsuTq">signal traces</a> on that board (rather than external cables). </p><p><a href="/facts/Integrated_circuit/fjn6vg7C">Integrated circuits</a> are more expensive when they have more pins. To reduce the number of pins in a package, many ICs use a serial bus to transfer data when speed is not important. Some examples of such low-cost lower-speed serial buses include <a href="/facts/RS-232/NCpvGuyq">RS-232</a>, <a href="/facts/Digital_Addressable_Lighting_Interface/2wpLWnbT">DALI</a>, <a href="/facts/Serial_Peripheral_Interface_Bus/uSCU56eG">SPI</a>, <a href="/facts/CAN_bus/EGxoS88W">CAN bus</a>, <a href="/facts/I%25C2%25B2C/dKBBhs4U">I²C</a>, <a href="/facts/UNI%2fO/hkwC5wGk">UNI/O</a>, and <a href="/facts/1-Wire/HTbRwuTU">1-Wire</a>. Higher-speed serial buses include <a href="/facts/USB/XcIKWLyg">USB</a>, <a href="/facts/SATA/dW8yAMm8">SATA</a> and <a href="/facts/PCI_Express/ADhsLCUK">PCI Express</a>. </p> <h2 id="serial-versus-parallel">Serial versus parallel</h2> <p>The communication links, across which computers (or parts of computers) talk to one another, may be either serial or parallel. A parallel link transmits several streams of data simultaneously along multiple channels (e.g., wires, printed circuit tracks, or optical fibers); whereas, a serial link transmits only a single stream of data. The rationale for parallel communication was the added benefit of having <a href="/facts/Direct_Memory_Access/DWuVgclV">Direct Memory Access</a> to the 8-bit or 16-bit registry addresses at a time where mapping direct data lanes was more convenient and faster than synchronizing data serially. </p><p>Although a serial link may seem inferior to a parallel one, since it can transmit less data per clock cycle, it is often the case that serial links can be clocked considerably faster than parallel links in order to achieve a higher data rate. Several factors allow serial to be clocked at a higher rate: </p> <ul><li><a href="/facts/Clock_skew/SKfmwW2Y">Clock skew</a> between different channels is not an issue (for unclocked <a href="/facts/Asynchronous_serial_communication/amrIkBQR">asynchronous serial communication</a> links). This can be caused by mismatched wire or conductor lengths.<a class="footnote-ref" id="fnref:16" href="#fn:16"><sup>16</sup></a><a class="footnote-ref" id="fnref:17" href="#fn:17"><sup>17</sup></a></li> <li>A serial connection requires fewer interconnecting cables (e.g., wires/fibers) and hence occupies less space. The extra space allows for better isolation of the channel from its surroundings.</li> <li><a href="/facts/Crosstalk/IT2LIwth">Crosstalk</a> is less of an issue, because there are fewer conductors in proximity.<a class="footnote-ref" id="fnref:18" href="#fn:18"><sup>18</sup></a></li> <li>Budgets for power use, power dissipation, cable cost, component cost, IC die area, PC board area, ESD protection, etc. can be focused on a single link.</li></ul> <p>The transition from parallel to serial buses was allowed by <a href="/facts/Moore%2527s_law/90CSekhl">Moore's law</a> which allowed for the incorporation of SerDes in integrated circuits.<a class="footnote-ref" id="fnref:19" href="#fn:19"><sup>19</sup></a> An electrical serial link only requires a pair of wires, whereas a parallel link requires several. Thus serial links can save on costs (also known as the <a href="/facts/Bill_of_Materials/cFFW9fga">Bill of Materials</a>). <a href="/facts/Differential_signalling/jusjFQKo">Differential signalling</a> uses length-matched wires or conductors and are used in high speed serial links.<a class="footnote-ref" id="fnref:20" href="#fn:20"><sup>20</sup></a> Length-matching is easier to perform on serial links as they require fewer conductors. </p><p>In many cases, serial is cheaper to implement than parallel. Many <a href="/facts/Integrated_circuit/fjn6vg7C">ICs</a> have serial interfaces, as opposed to parallel ones, so that they have fewer pins and are therefore less expensive. </p> <h2 id="examples-of-architectures">Examples of architectures</h2> <ul><li><a href="/facts/ARINC_818/95PK7WDy">ARINC 818</a> Avionics Digital Video Bus</li> <li><a href="/facts/Atari_SIO/TpvhgLVt">Atari SIO</a> (Joe Decuir credits his work on Atari SIO as the basis of USB)</li> <li><a href="/facts/Binary_Synchronous_Communications/D3HfJsHC">Binary Synchronous Communications</a> BSC - Binary Synchronous Communications</li> <li><a href="/facts/CAN_bus/EGxoS88W">CAN</a> Control Area Network Vehicle Bus</li> <li><a href="/facts/CcTalk/BWfv2cTT">ccTalk</a> Used in the money transaction and point-of-sale industry</li> <li><a href="/facts/CoaXPress/HFX3s3Fl">CoaXPress</a> industrial camera protocol over Coax</li> <li><a href="/facts/DMX512/B9WSCzpW">DMX512</a> control of theatrical lighting</li> <li><a href="/facts/Ethernet/nMfhU8tU">Ethernet</a></li> <li><a href="/facts/Fiber_Distributed_Data_Interface/nowmb0ue">Fiber Distributed Data Interface</a></li> <li><a href="/facts/Fibre_Channel/C7C0yreb">Fibre Channel</a> (high-speed, for connecting computers to mass storage devices)</li> <li><a href="/facts/FireWire/XYdQlxfy">FireWire</a></li> <li><a href="/facts/HDMI/HuNwzm04">HDMI</a></li> <li><a href="/facts/HyperTransport/6CPnQ1RL">HyperTransport</a></li> <li><a href="/facts/InfiniBand/6CUz47wQ">InfiniBand</a> (very high speed, broadly comparable in scope to <a href="/facts/Peripheral_Component_Interconnect/n6CGuFvP">PCI</a>)</li> <li><a href="/facts/I%25C2%25B2C/dKBBhs4U">I²C</a> multidrop serial bus</li> <li><a href="/facts/MIDI/tblhmeFV">MIDI</a> control of electronic musical instruments</li> <li><a href="/facts/MIL-STD-1553/5Xb7yyke">MIL-STD-1553A/B</a></li> <li><a href="/facts/Morse_code/GXwCl1HV">Morse code</a> <a href="/facts/Telegraphy/JhRYDSDu">telegraphy</a></li> <li><a href="/facts/PCI_Express/ADhsLCUK">PCI Express</a></li> <li><a href="/facts/Profibus/8GBvaRCb">Profibus</a></li> <li><a href="/facts/RS-232/NCpvGuyq">RS-232</a> (low-speed, implemented by <a href="/facts/Serial_port/VpcrH530">serial ports</a>)</li> <li><a href="/facts/RS-422/le2rYC8T">RS-422</a> multidrop serial bus</li> <li><a href="/facts/RS-423/T5xNBdT3">RS-423</a></li> <li><a href="/facts/RS-485/YEABejzm">RS-485</a> multidrop multimaster serial bus</li> <li><a href="/facts/SDI-12/mEfPfVW4">SDI-12</a> industrial sensor protocol</li> <li><a href="/facts/SERCOM/5WRFqHJG">SERCOM</a></li> <li><a href="/facts/Serial_ATA/dW8yAMm8">Serial ATA</a></li> <li><a href="/facts/Serial_Attached_SCSI/ekU6NmqQ">Serial Attached SCSI</a></li> <li><a href="/facts/Shift_Register/foHzdJft">Shift Register</a> with serial-in and serial-out configuration</li> <li><a href="/facts/SONET/G3LgtGS6">SONET</a> and <a href="/facts/Synchronous_Optical_Networking/G3LgtGS6">SDH</a> (high speed telecommunication over optical fibers)</li> <li><a href="/facts/SpaceWire/7LYsotsn">SpaceWire</a> Spacecraft communication network</li> <li><a href="/facts/S%2fPDIF/7esUguQA">S/PDIF</a> and <a href="/facts/AES3/Il4EdVYj">AES3</a> audio communication protocols</li> <li><a href="/facts/Serial_Peripheral_Interface_Bus/uSCU56eG">SPI</a></li> <li><a href="/facts/T-carrier/tCsEdK72">T-1</a>, <a href="/facts/E-carrier/h0MXcgXN">E-1</a> and variants (high speed telecommunication over copper pairs)</li> <li><a href="/facts/Universal_Serial_Bus/XcIKWLyg">Universal Serial Bus</a> (for connecting peripherals to computers)</li> <li><a href="/facts/UNI%2fO/hkwC5wGk">UNI/O</a> multidrop serial bus</li> <li><a href="/facts/1-Wire/HTbRwuTU">1-Wire</a> multidrop serial bus</li></ul> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/8N1/aK302qyy">8N1</a></li> <li><a href="/facts/Asynchronous_serial_communication/amrIkBQR">Asynchronous serial communication</a></li> <li><a href="/facts/Comparison_of_synchronous_and_asynchronous_signalling/NHNkAdqv">Comparison of synchronous and asynchronous signalling</a></li> <li><a href="/facts/Computer_bus/R45TKwS7">Computer bus</a></li> <li><a href="/facts/Data_transmission/1yAhaANd">Data transmission</a></li> <li><a href="/facts/Eye_pattern/U5QpEKUQ">Eye pattern</a></li> <li><a href="/facts/Federal_Standard_1037C/CA4jqghV">Federal Standard 1037C</a></li> <li><a href="/facts/High-Level_Data_Link_Control/aTndRUQ3">High-Level Data Link Control</a> (HDLC)</li> <li><a href="/facts/List_of_device_bandwidths/RJzvfP0g">List of device bandwidths</a></li> <li><a href="/facts/MIL-STD-188/D5rsvdsW">MIL-STD-188</a></li> <li><a href="/facts/Serial_Peripheral_Interface_Bus/uSCU56eG">Serial Peripheral Interface Bus</a></li> <li><a href="/facts/Serial_port/VpcrH530">Serial port</a></li> <li><a href="/facts/Synchronous_serial_communication/Ar6sp7Eb">Synchronous serial communication</a></li> <li><a href="/facts/Universal_asynchronous_receiver%2ftransmitter/xMntJcsI">Universal asynchronous receiver/transmitter</a> (UART)</li></ul> <h2 id="external-links">External links</h2> <ul><li><a href="http://www.societyofrobots.com/microcontroller_uart.shtml">Serial Interface Tutorial for Robotics</a> (contains many practical examples)</li> <li><a href="http://pinouts.ru/pin_SerialPorts.shtml">Serial interfaces listing (with pinouts)</a></li> <li><a href="http://c2.com/cgi/wiki?SerialPorts">Wiki: Serial Ports</a></li> <li><a href="https://web.archive.org/web/20090226195855/http://www.thaiio.com/prog-cgi/VBnetSerialPort.htm">Visual studio 2008 coding for Serial communication</a></li> <li><a href="http://www.byteparadigm.com/kb/article/AA-00255">Introduction to I²C and SPI protocols</a> <a href="https://web.archive.org/web/20160308185505/http://byteparadigm.com/kb/article/aa-00255">Archived</a> 2016-03-08 at the <a href="/facts/Wayback_Machine/nmQ3a6JC">Wayback Machine</a></li> <li><a href="https://learn.sparkfun.com/tutorials/serial-communication/all">Serial communication introduction</a></li> <li><a href="https://training-kits.appspot.com/serial-linux.html">Serial Port Programming in Linux</a> <a href="https://web.archive.org/web/20180702014758/http://training-kits.appspot.com/serial-linux.html">Archived</a> 2018-07-02 at the <a href="/facts/Wayback_Machine/nmQ3a6JC">Wayback Machine</a></li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>Robinson, Dan (12 January 2022). "Final PCIe 6.0 specs unleashed: 64 GTps link speed incoming... with products to follow in 2023". The Register. <a href="https://www.theregister.com/2022/01/12/final_pcie_60_specs_released/" target="_blank">https://www.theregister.com/2022/01/12/final_pcie_60_specs_released/</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>"PCIe 7.0 Draft 0.5 Spec Available: 512 GB/S over PCIe x16 on Track for 2025". <a href="https://www.anandtech.com/show/21335/full-draft-of-pcie-70-spec-available-512-gbs-over-pcie-x16-incoming" target="_blank">https://www.anandtech.com/show/21335/full-draft-of-pcie-70-spec-available-512-gbs-over-pcie-x16-incoming</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>"PCIe 5.0 is just beginning to come to new PCS, but version 6.0 is already here". 12 January 2022. <a href="https://arstechnica.com/gadgets/2022/01/pci-express-6-0-spec-is-finalized-doubling-bandwidth-for-ssds-gpus-and-more/" target="_blank">https://arstechnica.com/gadgets/2022/01/pci-express-6-0-spec-is-finalized-doubling-bandwidth-for-ssds-gpus-and-more/</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>Handbook of Serial Communications Interfaces: A Comprehensive Compendium of Serial Digital Input/Output (I/O) Standards. Newnes. 21 August 2015. ISBN 978-0-12-800671-9. <a href="978-0-12-800671-9" target="_blank">978-0-12-800671-9</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> <li id="fn:5"><p>"PAM4: For Better and Worse | 2019-02-26 | Signal Integrity Journal". <a href="https://www.signalintegrityjournal.com/articles/1151-pam4-for-better-and-worse" target="_blank">https://www.signalintegrityjournal.com/articles/1151-pam4-for-better-and-worse</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li> <li id="fn:6"><p>"PAM-4 Signaling". <a href="https://semiengineering.com/knowledge_centers/communications-io/off-chip-communications/pam-4-signaling/" target="_blank">https://semiengineering.com/knowledge_centers/communications-io/off-chip-communications/pam-4-signaling/</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li> <li id="fn:7"><p>Zhang, Hongtao; Jiao, Brandon; Liao, Yu; Zhang, Geoff. PAM4 Signaling for 56G Serial Link Applications − A Tutorial (PDF). DesignCon 2016. <a href="https://www.xilinx.com/publications/events/designcon/2016/slides-pam4signalingfor56gserial-zhang-designcon.pdf" target="_blank">https://www.xilinx.com/publications/events/designcon/2016/slides-pam4signalingfor56gserial-zhang-designcon.pdf</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></p></li> <li id="fn:8"><p>"PAM4 Signaling in High-Speed Serial Technology: Test, Analysis, and Debug" (PDF) (application note). Tektronix. <a href="https://download.tek.com/document/PAM4-Signaling-in-High-Speed-Serial-Technology_55W-60273.pdf" target="_blank">https://download.tek.com/document/PAM4-Signaling-in-High-Speed-Serial-Technology_55W-60273.pdf</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></p></li> <li id="fn:9"><p>Pan, Zhongqi; Yue, Yang (3 December 2019). Advanced DSP Techniques for High-Capacity and Energy-Efficient Optical Fiber Communications. ISBN 978-3-03921-792-2. <a href="978-3-03921-792-2" target="_blank">978-3-03921-792-2</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></p></li> <li id="fn:10"><p>Essentials of Modern Communications. John Wiley & Sons. 4 August 2020. ISBN 978-1-119-52149-5. <a href="978-1-119-52149-5" target="_blank">978-1-119-52149-5</a> <a href="#fnref:10" class="footnote-back-ref">↩</a></p></li> <li id="fn:11"><p>Kim, Gain (January 2022). "Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications". IEEE Open Journal of Circuits and Systems. 3 (1). Figure 2. doi:10.1109/OJCAS.2022.3189550. ISSN 2644-1225. <a href="https://www.researchgate.net/figure/Eye-diagrams-of-PAM-2-4-8-with-normalized-vertical-full-swing-level-Peak-to-peak-swings_fig2_361960252" target="_blank">https://www.researchgate.net/figure/Eye-diagrams-of-PAM-2-4-8-with-normalized-vertical-full-swing-level-Peak-to-peak-swings_fig2_361960252</a> <a href="#fnref:11" class="footnote-back-ref">↩</a></p></li> <li id="fn:12"><p>"Eye diagrams: The tool for serial data analysis". 4 June 2019. <a href="https://www.edn.com/eye-diagrams-the-tool-for-serial-data-analysis/" target="_blank">https://www.edn.com/eye-diagrams-the-tool-for-serial-data-analysis/</a> <a href="#fnref:12" class="footnote-back-ref">↩</a></p></li> <li id="fn:13"><p>"Advantages of PAM4 modulation | Disadvantages PAM4 signaling". <a href="https://www.rfwireless-world.com/Terminology/Advantages-and-disadvantages-of-PAM4-modulation.html" target="_blank">https://www.rfwireless-world.com/Terminology/Advantages-and-disadvantages-of-PAM4-modulation.html</a> <a href="#fnref:13" class="footnote-back-ref">↩</a></p></li> <li id="fn:14"><p>"Generate PAM4 signals for receiver compliance testing". 20 September 2016. <a href="https://www.edn.com/generate-pam4-signals-for-receiver-compliance-testing/" target="_blank">https://www.edn.com/generate-pam4-signals-for-receiver-compliance-testing/</a> <a href="#fnref:14" class="footnote-back-ref">↩</a></p></li> <li id="fn:15"><p>Complex Digital Hardware Design. CRC Press. 9 May 2024. ISBN 978-1-040-01179-9. <a href="978-1-040-01179-9" target="_blank">978-1-040-01179-9</a> <a href="#fnref:15" class="footnote-back-ref">↩</a></p></li> <li id="fn:16"><p>"Lecture 24" (PDF). CSE378: Machine Organization & Assembly Language. <a href="https://courses.cs.washington.edu/courses/cse378/11wi/lectures/lec24.pdf" target="_blank">https://courses.cs.washington.edu/courses/cse378/11wi/lectures/lec24.pdf</a> <a href="#fnref:16" class="footnote-back-ref">↩</a></p></li> <li id="fn:17"><p>Ledin, Jim; Farley, Dave (4 May 2022). Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCS, and cloud servers. Packt Publishing. ISBN 978-1-80323-823-4. <a href="978-1-80323-823-4" target="_blank">978-1-80323-823-4</a> <a href="#fnref:17" class="footnote-back-ref">↩</a></p></li> <li id="fn:18"><p>"Lecture 24" (PDF). CSE378: Machine Organization & Assembly Language. <a href="https://courses.cs.washington.edu/courses/cse378/11wi/lectures/lec24.pdf" target="_blank">https://courses.cs.washington.edu/courses/cse378/11wi/lectures/lec24.pdf</a> <a href="#fnref:18" class="footnote-back-ref">↩</a></p></li> <li id="fn:19"><p>The Boundary — Scan Handbook. Springer. 30 June 2003. ISBN 978-1-4020-7496-7. <a href="978-1-4020-7496-7" target="_blank">978-1-4020-7496-7</a> <a href="#fnref:19" class="footnote-back-ref">↩</a></p></li> <li id="fn:20"><p>Ledin, Jim; Farley, Dave (4 May 2022). Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCS, and cloud servers. Packt Publishing. ISBN 978-1-80323-823-4. <a href="978-1-80323-823-4" target="_blank">978-1-80323-823-4</a> <a href="#fnref:20" class="footnote-back-ref">↩</a></p></li> </ol>