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Autonomous peripheral operation
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<h2 id="overview">Overview</h2> <p>Forms of autonomous peripherals in microcontrollers were first introduced in the 1990s. Allowing embedded <a href="/facts/Peripheral/3lEBPE14">peripherals</a> to work independently of the <a href="/facts/CPU/Jxp1bqMV">CPU</a> and even interact with each other in certain pre-configurable ways off-loads event-driven communication into the peripherals to help improve the <a href="/facts/Real-time_computing/p9HxgL4L">real-time</a> performance due to lower <a href="/facts/Latency_(engineering)/6Bjhn30H">latency</a> and allows for potentially higher data <a href="/facts/Throughput/6zAUsXqw">throughput</a> due to the added parallelism. Since 2009, the scheme has been improved in newer implementations to continue functioning in <a href="/facts/Sleep_mode/lj6HSbyU">sleep modes</a> as well, thereby allowing the CPU (and other unaffected peripheral blocks) to remain dormant for longer periods of time in order to save energy. This is partially driven by the emerging <a href="/facts/Internet_of_things/rwwGAxn3">IoT</a> market.<a class="footnote-ref" id="fnref:1" href="#fn:1"><sup>1</sup></a> </p><p>Conceptually, autonomous peripheral operation can be seen as a generalization of and mixture between <a href="/facts/Direct_memory_access/DWuVgclV">direct memory access</a> (DMA) and <a href="/facts/Hardware_interrupt/Mm6C4rpc">hardware interrupts</a>. Peripherals that issue event signals are called <i>event generators</i> or <i>producers</i> whereas target peripherals are called <i>event users</i> or <i>consumers</i>. In some implementations, peripherals can be configured to pre-process the incoming data and perform various peripheral-specific functions like comparing, windowing, filtering or averaging in hardware without having to pass the data through the CPU for processing. </p> <h2 id="implementations">Implementations</h2> <p>Known implementations include: </p> <ul><li><i>Peripheral Event Controller</i> (<i>PEC</i>) in <a href="/facts/Siemens/coa80TQn">Siemens</a>/<a href="/facts/Infineon/LAAXwhcC">Infineon</a> <a href="/facts/C166/KYyvvTVp">C166</a> and <a href="/facts/C167/KYyvvTVp">C167</a> 16-bit microcontrollers since 1990<a class="footnote-ref" id="fnref:2" href="#fn:2"><sup>2</sup></a><a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a><a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a><a class="footnote-ref" id="fnref:5" href="#fn:5"><sup>5</sup></a></li> <li>Intelligent autonomous peripherals (Capture compare unit [de] <i>CCU6</i>) in Infineon <a href="/facts/Infineon_XC800/cH2T56mK">XC800</a> series of <a href="/facts/8051/2bqJXGlv">8051</a>-compatible 8-bit microcontrollers since 2005<a class="footnote-ref" id="fnref:6" href="#fn:6"><sup>6</sup></a></li> <li><i>Event System</i> (<i>EVSYS</i>) in <a href="/facts/Atmel/kIDF6tmA">Atmel</a> <a href="/facts/Atmel_AVR/JvfUk4ya">AVR</a> <a href="/facts/XMEGA/JvfUk4ya">XMEGA</a> 8-bit microcontrollers since 2008<a class="footnote-ref" id="fnref:7" href="#fn:7"><sup>7</sup></a><a class="footnote-ref" id="fnref:8" href="#fn:8"><sup>8</sup></a></li> <li><i>Peripheral Event System</i> (<i>PES</i>) with <i>SleepWalking</i><a class="footnote-ref" id="fnref:9" href="#fn:9"><sup>9</sup></a> in Atmel (now <a href="/facts/Microchip_Technology/7jDrY5rx">Microchip Technology</a>) <a href="/facts/AVR32/h0rYkzpA">AVR32</a> <a href="/facts/AT32UC3L/h0rYkzpA">AT32UC3L</a> 32-bit microcontrollers since 2009<a class="footnote-ref" id="fnref:10" href="#fn:10"><sup>10</sup></a><a class="footnote-ref" id="fnref:11" href="#fn:11"><sup>11</sup></a><a class="footnote-ref" id="fnref:12" href="#fn:12"><sup>12</sup></a></li> <li><i>Peripheral Reflex System</i> (<i>PRS</i>) in <a href="/facts/Energy_Micro/LrI5Qbk5">Energy Micro</a> (now <a href="/facts/Silicon_Labs/su2Sa5FN">Silicon Labs</a>) Gecko <a href="/facts/EFM32/ULvyWWcG">EFM32</a> 32-bit ARM-based microcontrollers since 2009<a class="footnote-ref" id="fnref:13" href="#fn:13"><sup>13</sup></a><a class="footnote-ref" id="fnref:14" href="#fn:14"><sup>14</sup></a><a class="footnote-ref" id="fnref:15" href="#fn:15"><sup>15</sup></a></li> <li><a href="/facts/IXYS/cqUTUdQB">IXYS</a>/<a href="/facts/Zilog/sB6jH5vw">Zilog</a> ZNEO Z16FMC 16-bit microcontrollers since 2011<a class="footnote-ref" id="fnref:16" href="#fn:16"><sup>16</sup></a><a class="footnote-ref" id="fnref:17" href="#fn:17"><sup>17</sup></a></li> <li><i>Event Link Controller</i> (<i>ELC</i>) in <a href="/facts/Renesas/ujhb9Dcz">Renesas</a> microcontrollers since 2011</li> <li><i>Programmable Peripheral Interconnect</i> (<i>PPI</i>) in <a href="/facts/Nordic_Semiconductor/x36PqPz2">Nordic</a> nRF 32-bit ARM-based microcontrollers since about 2011<a class="footnote-ref" id="fnref:18" href="#fn:18"><sup>18</sup></a></li> <li>Autonomous peripherals in Infineon <a href="/facts/Infineon_XMC/HWCNDnTh">XMC</a> 32-bit microcontrollers since 2012<a class="footnote-ref" id="fnref:19" href="#fn:19"><sup>19</sup></a></li> <li><i>Data Transfer Manager</i> (<i>DTM</i>) in <a href="/facts/Silicon_Labs/su2Sa5FN">Silicon Labs</a> <a href="/facts/Precision32/su2Sa5FN">Precision32</a> <a href="/facts/SiM3L1/su2Sa5FN">SiM3L1</a> 32-bit <a href="/facts/ARM_Cortex-M3/prW99nkV">ARM Cortex-M3</a> microcontrollers since 2012<a class="footnote-ref" id="fnref:20" href="#fn:20"><sup>20</sup></a><a class="footnote-ref" id="fnref:21" href="#fn:21"><sup>21</sup></a><a class="footnote-ref" id="fnref:22" href="#fn:22"><sup>22</sup></a></li> <li><i>Peripheral Event System</i> (<i>PES</i>) with <i>SleepWalking</i> in Atmel (now Microchip Technology) <a href="/facts/SAM4L/5WRFqHJG">SAM4L</a> 32-bit <a href="/facts/ARM_Cortex-M4/prW99nkV">ARM Cortex-M4</a> microcontrollers since 2012<a class="footnote-ref" id="fnref:23" href="#fn:23"><sup>23</sup></a></li> <li>Power-Smart Peripherals in <a href="/facts/Freescale/mRjBBbeX">Freescale</a> (now <a href="/facts/NXP/naAqdtWq">NXP</a>) <a href="/facts/Kinetis_L/mRjBBbeX">Kinetis L</a> 32-bit <a href="/facts/ARM_Cortex-M0%2B/prW99nkV">ARM Cortex-M0+</a> microcontrollers since 2012<a class="footnote-ref" id="fnref:24" href="#fn:24"><sup>24</sup></a></li> <li><i>Event System</i> (<i>EVSYS</i>) with <i>SleepWalking</i><a class="footnote-ref" id="fnref:25" href="#fn:25"><sup>25</sup></a> in Atmel (now Microchip Technology) <a href="/facts/SAMD_(processor)/5WRFqHJG">SAMD</a>, <a href="/facts/SAML_(processor)/5WRFqHJG">SAML</a> and SAMC 32-bit ARM Cortex-M0+ microcontrollers since 2013<a class="footnote-ref" id="fnref:26" href="#fn:26"><sup>26</sup></a><a class="footnote-ref" id="fnref:27" href="#fn:27"><sup>27</sup></a></li> <li><i>Core Independent Peripherals</i> (<i>CIP</i>) in Microchip <a href="/facts/PIC16F/NrRJCqHS">PIC16F</a><a class="footnote-ref" id="fnref:28" href="#fn:28"><sup>28</sup></a> and <a href="/facts/PIC18F/NrRJCqHS">PIC18F</a><a class="footnote-ref" id="fnref:29" href="#fn:29"><sup>29</sup></a> as well as Microchip AVR <a href="/facts/ATtiny/MkJqyxTx">ATtiny</a> 8-bit microcontrollers since 2015<a class="footnote-ref" id="fnref:30" href="#fn:30"><sup>30</sup></a><a class="footnote-ref" id="fnref:31" href="#fn:31"><sup>31</sup></a><a class="footnote-ref" id="fnref:32" href="#fn:32"><sup>32</sup></a></li> <li><i>Peripherals Interconnect Matrix</i> in <a href="/facts/STMicroelectronics/4gbGJTVr">STMicroelectronics</a>' <a href="/facts/STM32/JPCl0dSM">STM32</a> 32-bit ARM-based microcontrollers since 2015<a class="footnote-ref" id="fnref:33" href="#fn:33"><sup>33</sup></a></li> <li><i>Low-Power Background Autonomous Mode</i> (<i>LPBAM</i>) in STMicroelectronics' <a href="/facts/STM32U5/JPCl0dSM">STM32U5</a> 32-bit ARM-based microcontrollers since 2021<a class="footnote-ref" id="fnref:34" href="#fn:34"><sup>34</sup></a></li></ul> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/Channel_I/O/vDBtN2wQ">Channel I/O</a></li> <li><a href="/facts/Peripheral_DMA_controller/z4GKNtBL">Peripheral DMA controller</a> (PDC)</li> <li><a href="/facts/Clock_gating/u2nGKGPm">Clock gating</a>, <a href="/facts/Autonomous_peripheral_clock_gating/u2nGKGPm">autonomous peripheral clock gating</a></li> <li><a href="/facts/Power_gating/XoCvCTWH">Power gating</a></li> <li><a href="/facts/CPU_power_dissipation/nmyJTs0m">CPU power dissipation</a></li> <li><a href="/facts/Low-power_electronics/EwbH8r9B">Low-power electronics</a></li> <li><a href="/facts/Event-driven_architecture/THC25H6E">Event-driven architecture</a></li> <li><a href="/facts/Event-driven_programming/QlGL2Fu6">Event-driven programming</a></li> <li><a href="/facts/Always_On,_Always_Connected/0NWKXGLd">Always On, Always Connected</a> (AOAC)</li> <li><a href="/facts/Energy-Efficient_Ethernet/a2BDt7Cz">Energy-Efficient Ethernet</a> (EEE)</li> <li><a href="/facts/TCP_offload_engine/I3fPV7WK">TCP offload engine</a> (TOE)</li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>Pitcher, Graham (2014-01-28). "Things worthy of consideration - The Internet of Things is pushing microcontroller developers to move in unexpected directions". New Electronics. pp. 22–23. Archived from the original on 2018-05-10. Retrieved 2018-05-10. [1] <a href="http://www.newelectronics.co.uk/electronics-technology/the-internet-of-things-is-pushing-microcontroller-developers-to-move-in-unexpected-directions/59112/" target="_blank">http://www.newelectronics.co.uk/electronics-technology/the-internet-of-things-is-pushing-microcontroller-developers-to-move-in-unexpected-directions/59112/</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>Wolf, Axel (March 1994). "Connecting the C166 architecture to CAN (I)" (PDF). Components. Applications Microcontrollers. Vol. XXIX, no. 4. Siemens Aktiengesellschaft. pp. 42–44. Archived (PDF) from the original on 2021-12-02. Retrieved 2021-12-02. (3 pages) (NB. Mentions the term "autonomous peripherals" in conjunction with the Siemens/Infineon SAB 80C166 in 1994 already. Part II of the article: [2]) <a href="http://ep.etc.tuiasi.ro/site/DIVERSE/placi/CAN/34/pdf/can1.pdf" target="_blank">http://ep.etc.tuiasi.ro/site/DIVERSE/placi/CAN/34/pdf/can1.pdf</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>User's Manual - C167CR Derivatives - 16-Bit Single-Chip Microcontroller (PDF). 3.1 (2000-03 ed.). Munich, Germany: Infineon Technologies AG. March 2000 [2000-02, 1999-03, 1996-03, 1994-08, 1992-07]. Archived (PDF) from the original on 2020-10-27. Retrieved 2021-12-02. {{cite book}}: |work= ignored (help) (NB. Discusses an autonomously operating built-in CAN controller and a "Peripheral Event Controller" (PEC).) <a href="https://www.keil.com/dd/docs/datashts/infineon/c167cr_um.pdf" target="_blank">https://www.keil.com/dd/docs/datashts/infineon/c167cr_um.pdf</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>CAN Connecting C166 and C500 Microcontroller to CAN (PDF). 1.0. Infineon Technologies AG. February 2004. Application Note AP29000. Archived (PDF) from the original on 2020-10-22. Retrieved 2021-12-02. {{cite book}}: |work= ignored (help) <a href="https://www.infineon.com/dgdl/Ap2900010_C166_C500_CAN.pdf?fileId=db3a304412b407950112b41975592877" target="_blank">https://www.infineon.com/dgdl/Ap2900010_C166_C500_CAN.pdf?fileId=db3a304412b407950112b41975592877</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> <li id="fn:5"><p>Irber, Alfred (Summer 2018) [2016-02-25, 2009-09-25]. Embedded Systems SS2018 (PDF). 2.0 (in German). Munich, Germany: FH München - Hochschule für angewandte Wissenschaften, Fakultät für Elektrotechnik und Informationstechnik. pp. 1, 17, 28, 37–40. ES. Archived (PDF) from the original on 2021-12-02. Retrieved 2021-12-02. <a href="https://pc01-lsw.ee.hm.edu/~irber/EmbeddedSystems/powerpoint_deutsch/EmbeddedSystemsSS18_skript_irber.pdf" target="_blank">https://pc01-lsw.ee.hm.edu/~irber/EmbeddedSystems/powerpoint_deutsch/EmbeddedSystemsSS18_skript_irber.pdf</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li> <li id="fn:6"><p>"XC800 Product Presentation - Capture Compare Unit CC6" (PDF). Infineon. May 2006. XC886 CC6 V1. Archived (PDF) from the original on 2018-05-10. Retrieved 2018-05-10. […] Drives need realtime performance – control loop must run faster than 2-4 PWM periods (e.g. 100-200us) – CPU performance is valuable and must be saved for key tasks – Question: How to offload the CPU? –Answer: Build intelligent and autonomous peripherals! […] CC6 in a Drive application: – generate PWM patterns for all kind of motors – operate always in a safe state – even in an error condition – interact with ADC for sensorless control of motors […] CC6 is used intensively – the more it works autonomous the more CPU load can be saved for control algorithms […] <a href="https://www.infineon.com/dgdl/XC8xx_CC6_v10.pdf?fileId=db3a304412b407950112b40c64690b15" target="_blank">https://www.infineon.com/dgdl/XC8xx_CC6_v10.pdf?fileId=db3a304412b407950112b40c64690b15</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li> <li id="fn:7"><p>Faure, Philippe (2008-02-26). "Atmel's AVR XMEGA Redefines System Performance for 8/16-bit Microcontrollers" (Press announcement). Atmel. Archived from the original on 2018-05-01. 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